From mboxrd@z Thu Jan 1 00:00:00 1970
From: bugzilla-daemon@freedesktop.org
Subject: [Bug 64193] LLVM RV670 regression since R600: Packetize instructions
Date: Tue, 14 May 2013 14:30:55 +0000
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Date: Tue, 14 May 2013 14:30:55 +0000
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https://bugs.freedesktop.org/show_bug.cgi?id=64193
--- Comment #9 from Alex Deucher ---
As mentioned by Vadim on IRC:
it seems many instructions in bytecode generated for RS880 have (incorrect)
OMOD = 2, that is, ALU WORD1 bit 7 is set where it shouldn't be set
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As mentioned by Vadim on IRC:
it seems many instructions in bytecode generated for RS880 have (incorrect)
OMOD = 2, that is, ALU WORD1 bit 7 is set where it shouldn't be set