(In reply to Marek Ol=C5=A1=C3=A1k from comment #13)
> (In reply to Tom Stellard from comment #12)
> >=20
> > I think the best solution here would be to teach the backend how =
to do a
> > scalar select based on value of vccz.
>=20
> You are missing the point. The condition code (VCC) isn't the same acr=
oss
> all threads. The problem is that the conditional assignment is transfo=
rmed
> into a form that makes descriptor load addresses non-uniform (dependen=
t on a
> VGPR). There is nothing the AMDGPU backend can do about it. It's not a
> problem in the backend.

Well the backend could iterate over all the variants to handle that, but I =
have
strong doubts that this would result in optimal performance.

So I think the best solution for now would be to mark the texture intrinsic=
 in
a way which disallows such optimizations.