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From: Peng Liang <liangpeng10@huawei.com>
To: Andrew Jones <drjones@redhat.com>
Cc: peter.maydell@linaro.org,
	Zhanghailiang <zhang.zhanghailiang@huawei.com>,
	mst@redhat.com, cohuck@redhat.com, qemu-devel@nongnu.org,
	xiexiangyou 00584000 <xiexiangyou@huawei.com>,
	qemu-arm@nongnu.org, pbonzini@redhat.com,
	zhukeqian 00502301 <zhukeqian1@huawei.com>
Subject: Re: [RFC 7/9] target/arm: Add CPU features to query-cpu-model-expansion
Date: Sat, 15 Aug 2020 10:19:05 +0800	[thread overview]
Message-ID: <c14eb457-5c64-b888-2b94-fcd5e4383c70@huawei.com> (raw)
In-Reply-To: <20200813125602.drapo7wyzg57k3jy@kamzik.brq.redhat.com>

On 8/13/2020 8:56 PM, Andrew Jones wrote:
> On Thu, Aug 13, 2020 at 06:26:55PM +0800, Peng Liang wrote:
>> Add CPU features to the result of query-cpu-model-expansion so that
>> other applications (such as libvirt) can know the supported CPU
>> features.
>>
>> Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
>> Signed-off-by: Peng Liang <liangpeng10@huawei.com>
>> ---
>>  target/arm/cpu.c     | 41 +++++++++++++++++++++++++++++++++++++++++
>>  target/arm/cpu.h     |  2 ++
>>  target/arm/monitor.c |  2 ++
>>  3 files changed, 45 insertions(+)
>>
>> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
>> index 3fc54cb3a4..0f620e8afe 100644
>> --- a/target/arm/cpu.c
>> +++ b/target/arm/cpu.c
>> @@ -25,6 +25,8 @@
>>  #include "qemu/module.h"
>>  #include "qapi/error.h"
>>  #include "qapi/visitor.h"
>> +#include "qapi/qmp/qdict.h"
>> +#include "qom/qom-qobject.h"
>>  #include "cpu.h"
>>  #include "internals.h"
>>  #include "exec/exec-all.h"
>> @@ -1515,6 +1517,45 @@ static const CPUFeatureDep feature_dependencies[] = {
>>      },
>>  };
>>  
>> +static char *strtolower(char *src)
>> +{
>> +    char *start = src;
>> +
>> +    for (; *src; ++src) {
>> +        *src = tolower(*src);
>> +    }
>> +
>> +    return start;
>> +}
> 
> Shouldn't need this. The CPU property names should already be lowercase.
> 

For convenience, we use the field part defined in FIELD macro as the name of
a CPU feature.  So, the names of CPU features are upper...

>> +
>> +void arm_cpu_features_to_dict(ARMCPU *cpu, QDict *features)
>> +{
>> +    Object *obj = OBJECT(cpu);
>> +    const char *name;
>> +    ObjectProperty *prop;
>> +    bool is_32bit = !arm_feature(&cpu->env, ARM_FEATURE_AARCH64);
>> +    int i;
>> +
>> +    for (i = 0; i < ARRAY_SIZE(cpu_features); ++i) {
>> +        if (is_32bit != cpu_features[i].is_32bit) {
>> +            continue;
>> +        }
>> +
>> +        name = cpu_features[i].name;
>> +        prop = object_property_find(obj, name, NULL);
>> +        if (prop) {
>> +            QObject *value;
>> +            g_autofree char *tmp;
>> +
>> +            assert(prop->get);
>> +            value = object_property_get_qobject(obj, name, &error_abort);
>> +            tmp = strtolower(g_strdup(name));
>> +
>> +            qdict_put_obj(features, tmp, value);
>> +        }
>> +    }
>> +}
>> +
>>  static void arm_cpu_get_bit_prop(Object *obj, Visitor *v, const char *name,
>>                                   void *opaque, Error **errp)
>>  {
>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>> index 5d8074d03b..da68b7f8f4 100644
>> --- a/target/arm/cpu.h
>> +++ b/target/arm/cpu.h
>> @@ -3933,4 +3933,6 @@ static inline bool isar_feature_any_tts2uxn(const ARMISARegisters *id)
>>  #define cpu_isar_feature(name, cpu) \
>>      ({ ARMCPU *cpu_ = (cpu); isar_feature_##name(&cpu_->isar); })
>>  
>> +void arm_cpu_features_to_dict(ARMCPU *cpu, QDict *features);
>> +
>>  #endif
>> diff --git a/target/arm/monitor.c b/target/arm/monitor.c
>> index ba6e01abd0..f8eb29efec 100644
>> --- a/target/arm/monitor.c
>> +++ b/target/arm/monitor.c
>> @@ -225,6 +225,8 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
>>          }
>>      }
>>  
>> +    arm_cpu_features_to_dict(ARM_CPU(obj), qdict_out);
> 
> Since nobody is looking for these features in qdict_in, then none
> of these features can be changed by QMP user. How does the QMP
> user probe whether or not the feature will work when enabled?
> 
> Thanks,
> drew
> 

My fault, I'll correct it.

Thanks,
Peng

>> +
>>      if (!qdict_size(qdict_out)) {
>>          qobject_unref(qdict_out);
>>      } else {
>> -- 
>> 2.18.4
>>
> 
> .
> 



  reply	other threads:[~2020-08-15 18:10 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-13 10:26 [RFC 0/9] Support disable/enable CPU features for AArch64 Peng Liang
2020-08-13 10:26 ` [RFC 1/9] target/arm: convert isar regs to array Peng Liang
2020-08-13 10:42   ` Philippe Mathieu-Daudé
2020-08-13 16:11     ` Richard Henderson
2020-08-13 10:26 ` [RFC 2/9] target/arm: parse cpu feature related options Peng Liang
2020-08-13 12:21   ` Andrew Jones
2020-08-15  2:19     ` Peng Liang
2020-08-15  6:51       ` Andrew Jones
2020-08-13 10:26 ` [RFC 3/9] target/arm: register CPU features for property Peng Liang
2020-08-13 12:34   ` Andrew Jones
2020-08-13 10:26 ` [RFC 4/9] target/arm: Allow ID registers to synchronize to KVM Peng Liang
2020-08-13 10:26 ` [RFC 5/9] target/arm: introduce CPU feature dependency mechanism Peng Liang
2020-08-13 12:48   ` Andrew Jones
2020-08-15  2:19     ` Peng Liang
2020-08-15  6:59       ` Andrew Jones
2020-08-13 10:26 ` [RFC 6/9] target/arm: introduce KVM_CAP_ARM_CPU_FEATURE Peng Liang
2020-08-13 11:00   ` Cornelia Huck
2020-08-15  2:19     ` Peng Liang
2020-08-13 10:26 ` [RFC 7/9] target/arm: Add CPU features to query-cpu-model-expansion Peng Liang
2020-08-13 12:56   ` Andrew Jones
2020-08-15  2:19     ` Peng Liang [this message]
2020-08-15  7:02       ` Andrew Jones
2020-08-13 10:26 ` [RFC 8/9] target/arm: Update ID fields Peng Liang
2020-08-13 10:26 ` [RFC 9/9] target/arm: Add more CPU features Peng Liang
2020-08-13 14:10 ` [RFC 0/9] Support disable/enable CPU features for AArch64 Andrew Jones
2020-08-13 16:30 ` no-reply
2020-08-13 16:34 ` no-reply
2020-08-13 16:38 ` no-reply

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