From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C724BC4743C for ; Mon, 14 Jun 2021 14:50:11 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D18D6128B for ; Mon, 14 Jun 2021 14:50:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D18D6128B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7004789D77; Mon, 14 Jun 2021 14:50:08 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id B507389CE3; Mon, 14 Jun 2021 14:50:06 +0000 (UTC) IronPort-SDR: Dvc3tQteuo5em7I25wEAptIHL9ZcYzyuYLR7r6x5Q3hCwO6789PUhjMnOLMEJLS/F/sNzwf1Jc 4YiAXqskWFpw== X-IronPort-AV: E=McAfee;i="6200,9189,10015"; a="205853272" X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="205853272" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 07:50:05 -0700 IronPort-SDR: qDf9fI3A1vPDNFUFk2t3ijy5C+iTzjWBQP6dee8Cq8Revk58gSw5RXa6r9zzgqBK3C9+KCdVNv rEByb0fJOS0Q== X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="553386328" Received: from fnygreen-mobl1.ger.corp.intel.com (HELO [10.249.254.50]) ([10.249.254.50]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 07:50:03 -0700 Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915/ttm: Adjust gem flags and caching settings after a move To: Matthew Auld References: <20210614115406.153107-1-thomas.hellstrom@linux.intel.com> <20210614115406.153107-3-thomas.hellstrom@linux.intel.com> From: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= Message-ID: Date: Mon, 14 Jun 2021 16:50:01 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel Graphics Development , Matthew Auld , ML dri-devel Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 6/14/21 3:48 PM, Matthew Auld wrote: > On Mon, 14 Jun 2021 at 12:54, Thomas Hellström > wrote: >> After a TTM move or object init we need to update the i915 gem flags and >> caching settings to reflect the new placement. Currently caching settings >> are not changed during the lifetime of an object, although that might >> change moving forward if we run into performance issues or issues with >> WC system page allocations. >> Also introduce gpu_binds_iomem() and cpu_maps_iomem() to clean up the >> various ways we previously used to detect this. >> Finally, initialize the TTM object reserved to be able to update >> flags and caching before anyone else gets hold of the object. >> >> Signed-off-by: Thomas Hellström >> --- >> v2: >> - Style fixes (Reported by Matthew Auld) >> v3: >> - More style fixes. Clarify why we're updating caching settings after move. >> (Suggested by Matthew Auld) >> --- >> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 111 +++++++++++++++++++----- >> 1 file changed, 89 insertions(+), 22 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> index 33ab47f1e05b..5176682a7d19 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> @@ -70,6 +70,17 @@ static struct ttm_placement i915_sys_placement = { >> .busy_placement = &lmem0_sys_placement_flags[1], >> }; >> >> +static bool gpu_binds_iomem(struct ttm_resource *mem) >> +{ >> + return mem->mem_type != TTM_PL_SYSTEM; >> +} >> + >> +static bool cpu_maps_iomem(struct ttm_resource *mem) >> +{ >> + /* Once / if we support GGTT, this is also false for cached ttm_tts */ >> + return mem->mem_type != TTM_PL_SYSTEM; >> +} >> + >> static void i915_ttm_adjust_lru(struct drm_i915_gem_object *obj); >> >> static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo, >> @@ -175,6 +186,40 @@ static void i915_ttm_free_cached_io_st(struct drm_i915_gem_object *obj) >> obj->ttm.cached_io_st = NULL; >> } >> >> +static void >> +i915_ttm_adjust_domains_after_cpu_move(struct drm_i915_gem_object *obj) >> +{ >> + struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); >> + >> + if (cpu_maps_iomem(bo->resource) || bo->ttm->caching != ttm_cached) { >> + obj->write_domain = I915_GEM_DOMAIN_WC; >> + obj->read_domains = I915_GEM_DOMAIN_WC; >> + } else { >> + obj->write_domain = I915_GEM_DOMAIN_CPU; >> + obj->read_domains = I915_GEM_DOMAIN_CPU; >> + } >> +} >> + >> +static void i915_ttm_adjust_gem_after_move(struct drm_i915_gem_object *obj) >> +{ >> + struct drm_i915_private *i915 = to_i915(obj->base.dev); >> + struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); >> + unsigned int cache_level; >> + >> + obj->mem_flags &= ~(I915_BO_FLAG_STRUCT_PAGE | I915_BO_FLAG_IOMEM); >> + >> + obj->mem_flags |= cpu_maps_iomem(bo->resource) ? I915_BO_FLAG_IOMEM : >> + I915_BO_FLAG_STRUCT_PAGE; >> + >> + if ((HAS_LLC(i915) || HAS_SNOOP(i915)) && !gpu_binds_iomem(bo->resource) && >> + bo->ttm->caching == ttm_cached) >> + cache_level = I915_CACHE_LLC; >> + else >> + cache_level = I915_CACHE_NONE; >> + >> + i915_gem_object_set_cache_coherency(obj, cache_level); >> +} >> + >> static void i915_ttm_purge(struct drm_i915_gem_object *obj) >> { >> struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); >> @@ -190,8 +235,10 @@ static void i915_ttm_purge(struct drm_i915_gem_object *obj) >> >> /* TTM's purge interface. Note that we might be reentering. */ >> ret = ttm_bo_validate(bo, &place, &ctx); >> - >> if (!ret) { >> + obj->write_domain = 0; >> + obj->read_domains = 0; >> + i915_ttm_adjust_gem_after_move(obj); >> i915_ttm_free_cached_io_st(obj); >> obj->mm.madv = __I915_MADV_PURGED; >> } >> @@ -273,12 +320,15 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj, >> struct ttm_resource *res) >> { >> struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); >> - struct ttm_resource_manager *man = >> - ttm_manager_type(bo->bdev, res->mem_type); >> >> - if (man->use_tt) >> + if (!gpu_binds_iomem(res)) >> return i915_ttm_tt_get_st(bo->ttm); >> >> + /* >> + * If CPU mapping differs, we need to add the ttm_tt pages to >> + * the resulting st. Might make sense for GGTT. >> + */ >> + GEM_WARN_ON(!cpu_maps_iomem(res)); >> return intel_region_ttm_node_to_st(obj->mm.region, res); >> } >> >> @@ -290,8 +340,6 @@ static int i915_ttm_move(struct ttm_buffer_object *bo, bool evict, >> struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo); >> struct ttm_resource_manager *dst_man = >> ttm_manager_type(bo->bdev, dst_mem->mem_type); >> - struct ttm_resource_manager *src_man = >> - ttm_manager_type(bo->bdev, bo->resource->mem_type); >> struct intel_memory_region *dst_reg, *src_reg; >> union { >> struct ttm_kmap_iter_tt tt; >> @@ -332,34 +380,36 @@ static int i915_ttm_move(struct ttm_buffer_object *bo, bool evict, >> if (IS_ERR(dst_st)) >> return PTR_ERR(dst_st); >> >> - /* If we start mapping GGTT, we can no longer use man::use_tt here. */ >> - dst_iter = dst_man->use_tt ? >> + dst_iter = !cpu_maps_iomem(dst_mem) ? >> ttm_kmap_iter_tt_init(&_dst_iter.tt, bo->ttm) : >> ttm_kmap_iter_iomap_init(&_dst_iter.io, &dst_reg->iomap, >> dst_st, dst_reg->region.start); >> >> - src_iter = src_man->use_tt ? >> + src_iter = !cpu_maps_iomem(bo->resource) ? >> ttm_kmap_iter_tt_init(&_src_iter.tt, bo->ttm) : >> ttm_kmap_iter_iomap_init(&_src_iter.io, &src_reg->iomap, >> obj->ttm.cached_io_st, >> src_reg->region.start); >> >> ttm_move_memcpy(bo, dst_mem->num_pages, dst_iter, src_iter); >> + /* Below dst_mem becomes bo->resource. */ >> ttm_bo_move_sync_cleanup(bo, dst_mem); >> + i915_ttm_adjust_domains_after_cpu_move(obj); >> i915_ttm_free_cached_io_st(obj); >> >> - if (!dst_man->use_tt) { >> + if (gpu_binds_iomem(dst_mem) || cpu_maps_iomem(dst_mem)) { >> obj->ttm.cached_io_st = dst_st; >> obj->ttm.get_io_page.sg_pos = dst_st->sgl; >> obj->ttm.get_io_page.sg_idx = 0; >> } >> >> + i915_ttm_adjust_gem_after_move(obj); >> return 0; >> } >> >> static int i915_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) >> { >> - if (mem->mem_type < I915_PL_LMEM0) >> + if (!cpu_maps_iomem(mem)) >> return 0; >> >> mem->bus.caching = ttm_write_combined; >> @@ -421,6 +471,16 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) >> if (ret) >> return ret == -ENOSPC ? -ENXIO : ret; >> >> + i915_ttm_adjust_lru(obj); >> + if (bo->ttm && !ttm_tt_is_populated(bo->ttm)) { >> + ret = ttm_tt_populate(bo->bdev, bo->ttm, &ctx); >> + if (ret) >> + return ret; >> + >> + i915_ttm_adjust_domains_after_cpu_move(obj); >> + i915_ttm_adjust_gem_after_move(obj); >> + } >> + >> /* Object either has a page vector or is an iomem object */ >> st = bo->ttm ? i915_ttm_tt_get_st(bo->ttm) : obj->ttm.cached_io_st; >> if (IS_ERR(st)) >> @@ -428,8 +488,6 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) >> >> __i915_gem_object_set_pages(obj, st, i915_sg_dma_sizes(st->sgl)); >> >> - i915_ttm_adjust_lru(obj); >> - >> return ret; >> } >> >> @@ -563,6 +621,7 @@ static u64 i915_ttm_mmap_offset(struct drm_i915_gem_object *obj) >> >> const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = { >> .name = "i915_gem_object_ttm", >> + .flags = I915_GEM_OBJECT_IS_SHRINKABLE, >> >> .get_pages = i915_ttm_get_pages, >> .put_pages = i915_ttm_put_pages, >> @@ -599,6 +658,10 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, >> { >> static struct lock_class_key lock_class; >> struct drm_i915_private *i915 = mem->i915; >> + struct ttm_operation_ctx ctx = { >> + .interruptible = true, >> + .no_wait_gpu = false, >> + }; >> enum ttm_bo_type bo_type; >> size_t alignment = 0; >> int ret; >> @@ -618,15 +681,14 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, >> i915_gem_object_init(obj, &i915_gem_ttm_obj_ops, &lock_class, flags); >> i915_gem_object_init_memory_region(obj, mem); >> i915_gem_object_make_unshrinkable(obj); >> - obj->read_domains = I915_GEM_DOMAIN_WC | I915_GEM_DOMAIN_GTT; >> - obj->mem_flags |= I915_BO_FLAG_IOMEM; >> - i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE); >> INIT_RADIX_TREE(&obj->ttm.get_io_page.radix, GFP_KERNEL | __GFP_NOWARN); >> mutex_init(&obj->ttm.get_io_page.lock); >> >> bo_type = (obj->flags & I915_BO_ALLOC_USER) ? ttm_bo_type_device : >> ttm_bo_type_kernel; >> >> + obj->base.vma_node.driver_private = i915_gem_to_ttm(obj); >> + >> /* >> * If this function fails, it will call the destructor, but >> * our caller still owns the object. So no freeing in the >> @@ -634,14 +696,19 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, >> * Similarly, in delayed_destroy, we can't call ttm_bo_put() >> * until successful initialization. >> */ >> - obj->base.vma_node.driver_private = i915_gem_to_ttm(obj); >> - ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size, >> - bo_type, &i915_sys_placement, alignment, >> - true, NULL, NULL, i915_ttm_bo_destroy); >> + ret = ttm_bo_init_reserved(&i915->bdev, i915_gem_to_ttm(obj), size, >> + bo_type, &i915_sys_placement, alignment, >> + &ctx, NULL, NULL, i915_ttm_bo_destroy); >> + >> + if (ret) >> + goto out; >> >> - if (!ret) >> - obj->ttm.created = true; >> + obj->ttm.created = true; >> + i915_ttm_adjust_domains_after_cpu_move(obj); >> + i915_ttm_adjust_gem_after_move(obj); >> + i915_gem_object_unlock(obj); > Looks like the is_shrinkable change was squashed in the next patch. > Doesn't really matter, > Reviewed-by: Matthew Auld Ugh. I'll fix that up for a final version and attach your R-B. Thanks, Thomas > >> +out: >> /* i915 wants -ENXIO when out of memory region space. */ >> return (ret == -ENOSPC) ? -ENXIO : ret; >> } >> -- >> 2.31.1 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E9D1C2B9F4 for ; Mon, 14 Jun 2021 14:50:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2127961283 for ; Mon, 14 Jun 2021 14:50:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2127961283 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7983D89D61; Mon, 14 Jun 2021 14:50:07 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id B507389CE3; Mon, 14 Jun 2021 14:50:06 +0000 (UTC) IronPort-SDR: Dvc3tQteuo5em7I25wEAptIHL9ZcYzyuYLR7r6x5Q3hCwO6789PUhjMnOLMEJLS/F/sNzwf1Jc 4YiAXqskWFpw== X-IronPort-AV: E=McAfee;i="6200,9189,10015"; a="205853272" X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="205853272" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 07:50:05 -0700 IronPort-SDR: qDf9fI3A1vPDNFUFk2t3ijy5C+iTzjWBQP6dee8Cq8Revk58gSw5RXa6r9zzgqBK3C9+KCdVNv rEByb0fJOS0Q== X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="553386328" Received: from fnygreen-mobl1.ger.corp.intel.com (HELO [10.249.254.50]) ([10.249.254.50]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 07:50:03 -0700 To: Matthew Auld References: <20210614115406.153107-1-thomas.hellstrom@linux.intel.com> <20210614115406.153107-3-thomas.hellstrom@linux.intel.com> From: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= Message-ID: Date: Mon, 14 Jun 2021 16:50:01 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915/ttm: Adjust gem flags and caching settings after a move X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel Graphics Development , Matthew Auld , ML dri-devel Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ck9uIDYvMTQvMjEgMzo0OCBQTSwgTWF0dGhldyBBdWxkIHdyb3RlOgo+IE9uIE1vbiwgMTQgSnVu IDIwMjEgYXQgMTI6NTQsIFRob21hcyBIZWxsc3Ryw7ZtCj4gPHRob21hcy5oZWxsc3Ryb21AbGlu dXguaW50ZWwuY29tPiB3cm90ZToKPj4gQWZ0ZXIgYSBUVE0gbW92ZSBvciBvYmplY3QgaW5pdCB3 ZSBuZWVkIHRvIHVwZGF0ZSB0aGUgaTkxNSBnZW0gZmxhZ3MgYW5kCj4+IGNhY2hpbmcgc2V0dGlu Z3MgdG8gcmVmbGVjdCB0aGUgbmV3IHBsYWNlbWVudC4gQ3VycmVudGx5IGNhY2hpbmcgc2V0dGlu Z3MKPj4gYXJlIG5vdCBjaGFuZ2VkIGR1cmluZyB0aGUgbGlmZXRpbWUgb2YgYW4gb2JqZWN0LCBh bHRob3VnaCB0aGF0IG1pZ2h0Cj4+IGNoYW5nZSBtb3ZpbmcgZm9yd2FyZCBpZiB3ZSBydW4gaW50 byBwZXJmb3JtYW5jZSBpc3N1ZXMgb3IgaXNzdWVzIHdpdGgKPj4gV0Mgc3lzdGVtIHBhZ2UgYWxs b2NhdGlvbnMuCj4+IEFsc28gaW50cm9kdWNlIGdwdV9iaW5kc19pb21lbSgpIGFuZCBjcHVfbWFw c19pb21lbSgpIHRvIGNsZWFuIHVwIHRoZQo+PiB2YXJpb3VzIHdheXMgd2UgcHJldmlvdXNseSB1 c2VkIHRvIGRldGVjdCB0aGlzLgo+PiBGaW5hbGx5LCBpbml0aWFsaXplIHRoZSBUVE0gb2JqZWN0 IHJlc2VydmVkIHRvIGJlIGFibGUgdG8gdXBkYXRlCj4+IGZsYWdzIGFuZCBjYWNoaW5nIGJlZm9y ZSBhbnlvbmUgZWxzZSBnZXRzIGhvbGQgb2YgdGhlIG9iamVjdC4KPj4KPj4gU2lnbmVkLW9mZi1i eTogVGhvbWFzIEhlbGxzdHLDtm0gPHRob21hcy5oZWxsc3Ryb21AbGludXguaW50ZWwuY29tPgo+ PiAtLS0KPj4gdjI6Cj4+IC0gU3R5bGUgZml4ZXMgKFJlcG9ydGVkIGJ5IE1hdHRoZXcgQXVsZCkK Pj4gdjM6Cj4+IC0gTW9yZSBzdHlsZSBmaXhlcy4gQ2xhcmlmeSB3aHkgd2UncmUgdXBkYXRpbmcg Y2FjaGluZyBzZXR0aW5ncyBhZnRlciBtb3ZlLgo+PiAgICAoU3VnZ2VzdGVkIGJ5IE1hdHRoZXcg QXVsZCkKPj4gLS0tCj4+ICAgZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0bS5j IHwgMTExICsrKysrKysrKysrKysrKysrKystLS0tLQo+PiAgIDEgZmlsZSBjaGFuZ2VkLCA4OSBp bnNlcnRpb25zKCspLCAyMiBkZWxldGlvbnMoLSkKPj4KPj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV90dG0uYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dl bS9pOTE1X2dlbV90dG0uYwo+PiBpbmRleCAzM2FiNDdmMWUwNWIuLjUxNzY2ODJhN2QxOSAxMDA2 NDQKPj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0bS5jCj4+ICsr KyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV90dG0uYwo+PiBAQCAtNzAsNiAr NzAsMTcgQEAgc3RhdGljIHN0cnVjdCB0dG1fcGxhY2VtZW50IGk5MTVfc3lzX3BsYWNlbWVudCA9 IHsKPj4gICAgICAgICAgLmJ1c3lfcGxhY2VtZW50ID0gJmxtZW0wX3N5c19wbGFjZW1lbnRfZmxh Z3NbMV0sCj4+ICAgfTsKPj4KPj4gK3N0YXRpYyBib29sIGdwdV9iaW5kc19pb21lbShzdHJ1Y3Qg dHRtX3Jlc291cmNlICptZW0pCj4+ICt7Cj4+ICsgICAgICAgcmV0dXJuIG1lbS0+bWVtX3R5cGUg IT0gVFRNX1BMX1NZU1RFTTsKPj4gK30KPj4gKwo+PiArc3RhdGljIGJvb2wgY3B1X21hcHNfaW9t ZW0oc3RydWN0IHR0bV9yZXNvdXJjZSAqbWVtKQo+PiArewo+PiArICAgICAgIC8qIE9uY2UgLyBp ZiB3ZSBzdXBwb3J0IEdHVFQsIHRoaXMgaXMgYWxzbyBmYWxzZSBmb3IgY2FjaGVkIHR0bV90dHMg Ki8KPj4gKyAgICAgICByZXR1cm4gbWVtLT5tZW1fdHlwZSAhPSBUVE1fUExfU1lTVEVNOwo+PiAr fQo+PiArCj4+ICAgc3RhdGljIHZvaWQgaTkxNV90dG1fYWRqdXN0X2xydShzdHJ1Y3QgZHJtX2k5 MTVfZ2VtX29iamVjdCAqb2JqKTsKPj4KPj4gICBzdGF0aWMgc3RydWN0IHR0bV90dCAqaTkxNV90 dG1fdHRfY3JlYXRlKHN0cnVjdCB0dG1fYnVmZmVyX29iamVjdCAqYm8sCj4+IEBAIC0xNzUsNiAr MTg2LDQwIEBAIHN0YXRpYyB2b2lkIGk5MTVfdHRtX2ZyZWVfY2FjaGVkX2lvX3N0KHN0cnVjdCBk cm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCj4+ICAgICAgICAgIG9iai0+dHRtLmNhY2hlZF9pb19z dCA9IE5VTEw7Cj4+ICAgfQo+Pgo+PiArc3RhdGljIHZvaWQKPj4gK2k5MTVfdHRtX2FkanVzdF9k b21haW5zX2FmdGVyX2NwdV9tb3ZlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCj4+ ICt7Cj4+ICsgICAgICAgc3RydWN0IHR0bV9idWZmZXJfb2JqZWN0ICpibyA9IGk5MTVfZ2VtX3Rv X3R0bShvYmopOwo+PiArCj4+ICsgICAgICAgaWYgKGNwdV9tYXBzX2lvbWVtKGJvLT5yZXNvdXJj ZSkgfHwgYm8tPnR0bS0+Y2FjaGluZyAhPSB0dG1fY2FjaGVkKSB7Cj4+ICsgICAgICAgICAgICAg ICBvYmotPndyaXRlX2RvbWFpbiA9IEk5MTVfR0VNX0RPTUFJTl9XQzsKPj4gKyAgICAgICAgICAg ICAgIG9iai0+cmVhZF9kb21haW5zID0gSTkxNV9HRU1fRE9NQUlOX1dDOwo+PiArICAgICAgIH0g ZWxzZSB7Cj4+ICsgICAgICAgICAgICAgICBvYmotPndyaXRlX2RvbWFpbiA9IEk5MTVfR0VNX0RP TUFJTl9DUFU7Cj4+ICsgICAgICAgICAgICAgICBvYmotPnJlYWRfZG9tYWlucyA9IEk5MTVfR0VN X0RPTUFJTl9DUFU7Cj4+ICsgICAgICAgfQo+PiArfQo+PiArCj4+ICtzdGF0aWMgdm9pZCBpOTE1 X3R0bV9hZGp1c3RfZ2VtX2FmdGVyX21vdmUoc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9i aikKPj4gK3sKPj4gKyAgICAgICBzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSA9IHRvX2k5 MTUob2JqLT5iYXNlLmRldik7Cj4+ICsgICAgICAgc3RydWN0IHR0bV9idWZmZXJfb2JqZWN0ICpi byA9IGk5MTVfZ2VtX3RvX3R0bShvYmopOwo+PiArICAgICAgIHVuc2lnbmVkIGludCBjYWNoZV9s ZXZlbDsKPj4gKwo+PiArICAgICAgIG9iai0+bWVtX2ZsYWdzICY9IH4oSTkxNV9CT19GTEFHX1NU UlVDVF9QQUdFIHwgSTkxNV9CT19GTEFHX0lPTUVNKTsKPj4gKwo+PiArICAgICAgIG9iai0+bWVt X2ZsYWdzIHw9IGNwdV9tYXBzX2lvbWVtKGJvLT5yZXNvdXJjZSkgPyBJOTE1X0JPX0ZMQUdfSU9N RU0gOgo+PiArICAgICAgICAgICAgICAgSTkxNV9CT19GTEFHX1NUUlVDVF9QQUdFOwo+PiArCj4+ ICsgICAgICAgaWYgKChIQVNfTExDKGk5MTUpIHx8IEhBU19TTk9PUChpOTE1KSkgJiYgIWdwdV9i aW5kc19pb21lbShiby0+cmVzb3VyY2UpICYmCj4+ICsgICAgICAgICAgIGJvLT50dG0tPmNhY2hp bmcgPT0gdHRtX2NhY2hlZCkKPj4gKyAgICAgICAgICAgICAgIGNhY2hlX2xldmVsID0gSTkxNV9D QUNIRV9MTEM7Cj4+ICsgICAgICAgZWxzZQo+PiArICAgICAgICAgICAgICAgY2FjaGVfbGV2ZWwg PSBJOTE1X0NBQ0hFX05PTkU7Cj4+ICsKPj4gKyAgICAgICBpOTE1X2dlbV9vYmplY3Rfc2V0X2Nh Y2hlX2NvaGVyZW5jeShvYmosIGNhY2hlX2xldmVsKTsKPj4gK30KPj4gKwo+PiAgIHN0YXRpYyB2 b2lkIGk5MTVfdHRtX3B1cmdlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCj4+ICAg ewo+PiAgICAgICAgICBzdHJ1Y3QgdHRtX2J1ZmZlcl9vYmplY3QgKmJvID0gaTkxNV9nZW1fdG9f dHRtKG9iaik7Cj4+IEBAIC0xOTAsOCArMjM1LDEwIEBAIHN0YXRpYyB2b2lkIGk5MTVfdHRtX3B1 cmdlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCj4+Cj4+ICAgICAgICAgIC8qIFRU TSdzIHB1cmdlIGludGVyZmFjZS4gTm90ZSB0aGF0IHdlIG1pZ2h0IGJlIHJlZW50ZXJpbmcuICov Cj4+ICAgICAgICAgIHJldCA9IHR0bV9ib192YWxpZGF0ZShibywgJnBsYWNlLCAmY3R4KTsKPj4g LQo+PiAgICAgICAgICBpZiAoIXJldCkgewo+PiArICAgICAgICAgICAgICAgb2JqLT53cml0ZV9k b21haW4gPSAwOwo+PiArICAgICAgICAgICAgICAgb2JqLT5yZWFkX2RvbWFpbnMgPSAwOwo+PiAr ICAgICAgICAgICAgICAgaTkxNV90dG1fYWRqdXN0X2dlbV9hZnRlcl9tb3ZlKG9iaik7Cj4+ICAg ICAgICAgICAgICAgICAgaTkxNV90dG1fZnJlZV9jYWNoZWRfaW9fc3Qob2JqKTsKPj4gICAgICAg ICAgICAgICAgICBvYmotPm1tLm1hZHYgPSBfX0k5MTVfTUFEVl9QVVJHRUQ7Cj4+ICAgICAgICAg IH0KPj4gQEAgLTI3MywxMiArMzIwLDE1IEBAIGk5MTVfdHRtX3Jlc291cmNlX2dldF9zdChzdHJ1 Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqLAo+PiAgICAgICAgICAgICAgICAgICAgICAgICAg IHN0cnVjdCB0dG1fcmVzb3VyY2UgKnJlcykKPj4gICB7Cj4+ICAgICAgICAgIHN0cnVjdCB0dG1f YnVmZmVyX29iamVjdCAqYm8gPSBpOTE1X2dlbV90b190dG0ob2JqKTsKPj4gLSAgICAgICBzdHJ1 Y3QgdHRtX3Jlc291cmNlX21hbmFnZXIgKm1hbiA9Cj4+IC0gICAgICAgICAgICAgICB0dG1fbWFu YWdlcl90eXBlKGJvLT5iZGV2LCByZXMtPm1lbV90eXBlKTsKPj4KPj4gLSAgICAgICBpZiAobWFu LT51c2VfdHQpCj4+ICsgICAgICAgaWYgKCFncHVfYmluZHNfaW9tZW0ocmVzKSkKPj4gICAgICAg ICAgICAgICAgICByZXR1cm4gaTkxNV90dG1fdHRfZ2V0X3N0KGJvLT50dG0pOwo+Pgo+PiArICAg ICAgIC8qCj4+ICsgICAgICAgICogSWYgQ1BVIG1hcHBpbmcgZGlmZmVycywgd2UgbmVlZCB0byBh ZGQgdGhlIHR0bV90dCBwYWdlcyB0bwo+PiArICAgICAgICAqIHRoZSByZXN1bHRpbmcgc3QuIE1p Z2h0IG1ha2Ugc2Vuc2UgZm9yIEdHVFQuCj4+ICsgICAgICAgICovCj4+ICsgICAgICAgR0VNX1dB Uk5fT04oIWNwdV9tYXBzX2lvbWVtKHJlcykpOwo+PiAgICAgICAgICByZXR1cm4gaW50ZWxfcmVn aW9uX3R0bV9ub2RlX3RvX3N0KG9iai0+bW0ucmVnaW9uLCByZXMpOwo+PiAgIH0KPj4KPj4gQEAg LTI5MCw4ICszNDAsNiBAQCBzdGF0aWMgaW50IGk5MTVfdHRtX21vdmUoc3RydWN0IHR0bV9idWZm ZXJfb2JqZWN0ICpibywgYm9vbCBldmljdCwKPj4gICAgICAgICAgc3RydWN0IGRybV9pOTE1X2dl bV9vYmplY3QgKm9iaiA9IGk5MTVfdHRtX3RvX2dlbShibyk7Cj4+ICAgICAgICAgIHN0cnVjdCB0 dG1fcmVzb3VyY2VfbWFuYWdlciAqZHN0X21hbiA9Cj4+ICAgICAgICAgICAgICAgICAgdHRtX21h bmFnZXJfdHlwZShiby0+YmRldiwgZHN0X21lbS0+bWVtX3R5cGUpOwo+PiAtICAgICAgIHN0cnVj dCB0dG1fcmVzb3VyY2VfbWFuYWdlciAqc3JjX21hbiA9Cj4+IC0gICAgICAgICAgICAgICB0dG1f bWFuYWdlcl90eXBlKGJvLT5iZGV2LCBiby0+cmVzb3VyY2UtPm1lbV90eXBlKTsKPj4gICAgICAg ICAgc3RydWN0IGludGVsX21lbW9yeV9yZWdpb24gKmRzdF9yZWcsICpzcmNfcmVnOwo+PiAgICAg ICAgICB1bmlvbiB7Cj4+ICAgICAgICAgICAgICAgICAgc3RydWN0IHR0bV9rbWFwX2l0ZXJfdHQg dHQ7Cj4+IEBAIC0zMzIsMzQgKzM4MCwzNiBAQCBzdGF0aWMgaW50IGk5MTVfdHRtX21vdmUoc3Ry dWN0IHR0bV9idWZmZXJfb2JqZWN0ICpibywgYm9vbCBldmljdCwKPj4gICAgICAgICAgaWYgKElT X0VSUihkc3Rfc3QpKQo+PiAgICAgICAgICAgICAgICAgIHJldHVybiBQVFJfRVJSKGRzdF9zdCk7 Cj4+Cj4+IC0gICAgICAgLyogSWYgd2Ugc3RhcnQgbWFwcGluZyBHR1RULCB3ZSBjYW4gbm8gbG9u Z2VyIHVzZSBtYW46OnVzZV90dCBoZXJlLiAqLwo+PiAtICAgICAgIGRzdF9pdGVyID0gZHN0X21h bi0+dXNlX3R0ID8KPj4gKyAgICAgICBkc3RfaXRlciA9ICFjcHVfbWFwc19pb21lbShkc3RfbWVt KSA/Cj4+ICAgICAgICAgICAgICAgICAgdHRtX2ttYXBfaXRlcl90dF9pbml0KCZfZHN0X2l0ZXIu dHQsIGJvLT50dG0pIDoKPj4gICAgICAgICAgICAgICAgICB0dG1fa21hcF9pdGVyX2lvbWFwX2lu aXQoJl9kc3RfaXRlci5pbywgJmRzdF9yZWctPmlvbWFwLAo+PiAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICBkc3Rfc3QsIGRzdF9yZWctPnJlZ2lvbi5zdGFydCk7Cj4+ Cj4+IC0gICAgICAgc3JjX2l0ZXIgPSBzcmNfbWFuLT51c2VfdHQgPwo+PiArICAgICAgIHNyY19p dGVyID0gIWNwdV9tYXBzX2lvbWVtKGJvLT5yZXNvdXJjZSkgPwo+PiAgICAgICAgICAgICAgICAg IHR0bV9rbWFwX2l0ZXJfdHRfaW5pdCgmX3NyY19pdGVyLnR0LCBiby0+dHRtKSA6Cj4+ICAgICAg ICAgICAgICAgICAgdHRtX2ttYXBfaXRlcl9pb21hcF9pbml0KCZfc3JjX2l0ZXIuaW8sICZzcmNf cmVnLT5pb21hcCwKPj4gICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg b2JqLT50dG0uY2FjaGVkX2lvX3N0LAo+PiAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICBzcmNfcmVnLT5yZWdpb24uc3RhcnQpOwo+Pgo+PiAgICAgICAgICB0dG1fbW92 ZV9tZW1jcHkoYm8sIGRzdF9tZW0tPm51bV9wYWdlcywgZHN0X2l0ZXIsIHNyY19pdGVyKTsKPj4g KyAgICAgICAvKiBCZWxvdyBkc3RfbWVtIGJlY29tZXMgYm8tPnJlc291cmNlLiAqLwo+PiAgICAg ICAgICB0dG1fYm9fbW92ZV9zeW5jX2NsZWFudXAoYm8sIGRzdF9tZW0pOwo+PiArICAgICAgIGk5 MTVfdHRtX2FkanVzdF9kb21haW5zX2FmdGVyX2NwdV9tb3ZlKG9iaik7Cj4+ICAgICAgICAgIGk5 MTVfdHRtX2ZyZWVfY2FjaGVkX2lvX3N0KG9iaik7Cj4+Cj4+IC0gICAgICAgaWYgKCFkc3RfbWFu LT51c2VfdHQpIHsKPj4gKyAgICAgICBpZiAoZ3B1X2JpbmRzX2lvbWVtKGRzdF9tZW0pIHx8IGNw dV9tYXBzX2lvbWVtKGRzdF9tZW0pKSB7Cj4+ICAgICAgICAgICAgICAgICAgb2JqLT50dG0uY2Fj aGVkX2lvX3N0ID0gZHN0X3N0Owo+PiAgICAgICAgICAgICAgICAgIG9iai0+dHRtLmdldF9pb19w YWdlLnNnX3BvcyA9IGRzdF9zdC0+c2dsOwo+PiAgICAgICAgICAgICAgICAgIG9iai0+dHRtLmdl dF9pb19wYWdlLnNnX2lkeCA9IDA7Cj4+ICAgICAgICAgIH0KPj4KPj4gKyAgICAgICBpOTE1X3R0 bV9hZGp1c3RfZ2VtX2FmdGVyX21vdmUob2JqKTsKPj4gICAgICAgICAgcmV0dXJuIDA7Cj4+ICAg fQo+Pgo+PiAgIHN0YXRpYyBpbnQgaTkxNV90dG1faW9fbWVtX3Jlc2VydmUoc3RydWN0IHR0bV9k ZXZpY2UgKmJkZXYsIHN0cnVjdCB0dG1fcmVzb3VyY2UgKm1lbSkKPj4gICB7Cj4+IC0gICAgICAg aWYgKG1lbS0+bWVtX3R5cGUgPCBJOTE1X1BMX0xNRU0wKQo+PiArICAgICAgIGlmICghY3B1X21h cHNfaW9tZW0obWVtKSkKPj4gICAgICAgICAgICAgICAgICByZXR1cm4gMDsKPj4KPj4gICAgICAg ICAgbWVtLT5idXMuY2FjaGluZyA9IHR0bV93cml0ZV9jb21iaW5lZDsKPj4gQEAgLTQyMSw2ICs0 NzEsMTYgQEAgc3RhdGljIGludCBpOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0IGRybV9pOTE1X2dl bV9vYmplY3QgKm9iaikKPj4gICAgICAgICAgaWYgKHJldCkKPj4gICAgICAgICAgICAgICAgICBy ZXR1cm4gcmV0ID09IC1FTk9TUEMgPyAtRU5YSU8gOiByZXQ7Cj4+Cj4+ICsgICAgICAgaTkxNV90 dG1fYWRqdXN0X2xydShvYmopOwo+PiArICAgICAgIGlmIChiby0+dHRtICYmICF0dG1fdHRfaXNf cG9wdWxhdGVkKGJvLT50dG0pKSB7Cj4+ICsgICAgICAgICAgICAgICByZXQgPSB0dG1fdHRfcG9w dWxhdGUoYm8tPmJkZXYsIGJvLT50dG0sICZjdHgpOwo+PiArICAgICAgICAgICAgICAgaWYgKHJl dCkKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgcmV0dXJuIHJldDsKPj4gKwo+PiArICAgICAg ICAgICAgICAgaTkxNV90dG1fYWRqdXN0X2RvbWFpbnNfYWZ0ZXJfY3B1X21vdmUob2JqKTsKPj4g KyAgICAgICAgICAgICAgIGk5MTVfdHRtX2FkanVzdF9nZW1fYWZ0ZXJfbW92ZShvYmopOwo+PiAr ICAgICAgIH0KPj4gKwo+PiAgICAgICAgICAvKiBPYmplY3QgZWl0aGVyIGhhcyBhIHBhZ2UgdmVj dG9yIG9yIGlzIGFuIGlvbWVtIG9iamVjdCAqLwo+PiAgICAgICAgICBzdCA9IGJvLT50dG0gPyBp OTE1X3R0bV90dF9nZXRfc3QoYm8tPnR0bSkgOiBvYmotPnR0bS5jYWNoZWRfaW9fc3Q7Cj4+ICAg ICAgICAgIGlmIChJU19FUlIoc3QpKQo+PiBAQCAtNDI4LDggKzQ4OCw2IEBAIHN0YXRpYyBpbnQg aTkxNV90dG1fZ2V0X3BhZ2VzKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCj4+Cj4+ ICAgICAgICAgIF9faTkxNV9nZW1fb2JqZWN0X3NldF9wYWdlcyhvYmosIHN0LCBpOTE1X3NnX2Rt YV9zaXplcyhzdC0+c2dsKSk7Cj4+Cj4+IC0gICAgICAgaTkxNV90dG1fYWRqdXN0X2xydShvYmop Owo+PiAtCj4+ICAgICAgICAgIHJldHVybiByZXQ7Cj4+ICAgfQo+Pgo+PiBAQCAtNTYzLDYgKzYy MSw3IEBAIHN0YXRpYyB1NjQgaTkxNV90dG1fbW1hcF9vZmZzZXQoc3RydWN0IGRybV9pOTE1X2dl bV9vYmplY3QgKm9iaikKPj4KPj4gICBjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdF9v cHMgaTkxNV9nZW1fdHRtX29ial9vcHMgPSB7Cj4+ICAgICAgICAgIC5uYW1lID0gImk5MTVfZ2Vt X29iamVjdF90dG0iLAo+PiArICAgICAgIC5mbGFncyA9IEk5MTVfR0VNX09CSkVDVF9JU19TSFJJ TktBQkxFLAo+Pgo+PiAgICAgICAgICAuZ2V0X3BhZ2VzID0gaTkxNV90dG1fZ2V0X3BhZ2VzLAo+ PiAgICAgICAgICAucHV0X3BhZ2VzID0gaTkxNV90dG1fcHV0X3BhZ2VzLAo+PiBAQCAtNTk5LDYg KzY1OCwxMCBAQCBpbnQgX19pOTE1X2dlbV90dG1fb2JqZWN0X2luaXQoc3RydWN0IGludGVsX21l bW9yeV9yZWdpb24gKm1lbSwKPj4gICB7Cj4+ICAgICAgICAgIHN0YXRpYyBzdHJ1Y3QgbG9ja19j bGFzc19rZXkgbG9ja19jbGFzczsKPj4gICAgICAgICAgc3RydWN0IGRybV9pOTE1X3ByaXZhdGUg Kmk5MTUgPSBtZW0tPmk5MTU7Cj4+ICsgICAgICAgc3RydWN0IHR0bV9vcGVyYXRpb25fY3R4IGN0 eCA9IHsKPj4gKyAgICAgICAgICAgICAgIC5pbnRlcnJ1cHRpYmxlID0gdHJ1ZSwKPj4gKyAgICAg ICAgICAgICAgIC5ub193YWl0X2dwdSA9IGZhbHNlLAo+PiArICAgICAgIH07Cj4+ICAgICAgICAg IGVudW0gdHRtX2JvX3R5cGUgYm9fdHlwZTsKPj4gICAgICAgICAgc2l6ZV90IGFsaWdubWVudCA9 IDA7Cj4+ICAgICAgICAgIGludCByZXQ7Cj4+IEBAIC02MTgsMTUgKzY4MSwxNCBAQCBpbnQgX19p OTE1X2dlbV90dG1fb2JqZWN0X2luaXQoc3RydWN0IGludGVsX21lbW9yeV9yZWdpb24gKm1lbSwK Pj4gICAgICAgICAgaTkxNV9nZW1fb2JqZWN0X2luaXQob2JqLCAmaTkxNV9nZW1fdHRtX29ial9v cHMsICZsb2NrX2NsYXNzLCBmbGFncyk7Cj4+ICAgICAgICAgIGk5MTVfZ2VtX29iamVjdF9pbml0 X21lbW9yeV9yZWdpb24ob2JqLCBtZW0pOwo+PiAgICAgICAgICBpOTE1X2dlbV9vYmplY3RfbWFr ZV91bnNocmlua2FibGUob2JqKTsKPj4gLSAgICAgICBvYmotPnJlYWRfZG9tYWlucyA9IEk5MTVf R0VNX0RPTUFJTl9XQyB8IEk5MTVfR0VNX0RPTUFJTl9HVFQ7Cj4+IC0gICAgICAgb2JqLT5tZW1f ZmxhZ3MgfD0gSTkxNV9CT19GTEFHX0lPTUVNOwo+PiAtICAgICAgIGk5MTVfZ2VtX29iamVjdF9z ZXRfY2FjaGVfY29oZXJlbmN5KG9iaiwgSTkxNV9DQUNIRV9OT05FKTsKPj4gICAgICAgICAgSU5J VF9SQURJWF9UUkVFKCZvYmotPnR0bS5nZXRfaW9fcGFnZS5yYWRpeCwgR0ZQX0tFUk5FTCB8IF9f R0ZQX05PV0FSTik7Cj4+ICAgICAgICAgIG11dGV4X2luaXQoJm9iai0+dHRtLmdldF9pb19wYWdl LmxvY2spOwo+Pgo+PiAgICAgICAgICBib190eXBlID0gKG9iai0+ZmxhZ3MgJiBJOTE1X0JPX0FM TE9DX1VTRVIpID8gdHRtX2JvX3R5cGVfZGV2aWNlIDoKPj4gICAgICAgICAgICAgICAgICB0dG1f Ym9fdHlwZV9rZXJuZWw7Cj4+Cj4+ICsgICAgICAgb2JqLT5iYXNlLnZtYV9ub2RlLmRyaXZlcl9w cml2YXRlID0gaTkxNV9nZW1fdG9fdHRtKG9iaik7Cj4+ICsKPj4gICAgICAgICAgLyoKPj4gICAg ICAgICAgICogSWYgdGhpcyBmdW5jdGlvbiBmYWlscywgaXQgd2lsbCBjYWxsIHRoZSBkZXN0cnVj dG9yLCBidXQKPj4gICAgICAgICAgICogb3VyIGNhbGxlciBzdGlsbCBvd25zIHRoZSBvYmplY3Qu IFNvIG5vIGZyZWVpbmcgaW4gdGhlCj4+IEBAIC02MzQsMTQgKzY5NiwxOSBAQCBpbnQgX19pOTE1 X2dlbV90dG1fb2JqZWN0X2luaXQoc3RydWN0IGludGVsX21lbW9yeV9yZWdpb24gKm1lbSwKPj4g ICAgICAgICAgICogU2ltaWxhcmx5LCBpbiBkZWxheWVkX2Rlc3Ryb3ksIHdlIGNhbid0IGNhbGwg dHRtX2JvX3B1dCgpCj4+ICAgICAgICAgICAqIHVudGlsIHN1Y2Nlc3NmdWwgaW5pdGlhbGl6YXRp b24uCj4+ICAgICAgICAgICAqLwo+PiAtICAgICAgIG9iai0+YmFzZS52bWFfbm9kZS5kcml2ZXJf cHJpdmF0ZSA9IGk5MTVfZ2VtX3RvX3R0bShvYmopOwo+PiAtICAgICAgIHJldCA9IHR0bV9ib19p bml0KCZpOTE1LT5iZGV2LCBpOTE1X2dlbV90b190dG0ob2JqKSwgc2l6ZSwKPj4gLSAgICAgICAg ICAgICAgICAgICAgICAgICBib190eXBlLCAmaTkxNV9zeXNfcGxhY2VtZW50LCBhbGlnbm1lbnQs Cj4+IC0gICAgICAgICAgICAgICAgICAgICAgICAgdHJ1ZSwgTlVMTCwgTlVMTCwgaTkxNV90dG1f Ym9fZGVzdHJveSk7Cj4+ICsgICAgICAgcmV0ID0gdHRtX2JvX2luaXRfcmVzZXJ2ZWQoJmk5MTUt PmJkZXYsIGk5MTVfZ2VtX3RvX3R0bShvYmopLCBzaXplLAo+PiArICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgIGJvX3R5cGUsICZpOTE1X3N5c19wbGFjZW1lbnQsIGFsaWdubWVudCwK Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAmY3R4LCBOVUxMLCBOVUxMLCBp OTE1X3R0bV9ib19kZXN0cm95KTsKPj4gKwo+PiArICAgICAgIGlmIChyZXQpCj4+ICsgICAgICAg ICAgICAgICBnb3RvIG91dDsKPj4KPj4gLSAgICAgICBpZiAoIXJldCkKPj4gLSAgICAgICAgICAg ICAgIG9iai0+dHRtLmNyZWF0ZWQgPSB0cnVlOwo+PiArICAgICAgIG9iai0+dHRtLmNyZWF0ZWQg PSB0cnVlOwo+PiArICAgICAgIGk5MTVfdHRtX2FkanVzdF9kb21haW5zX2FmdGVyX2NwdV9tb3Zl KG9iaik7Cj4+ICsgICAgICAgaTkxNV90dG1fYWRqdXN0X2dlbV9hZnRlcl9tb3ZlKG9iaik7Cj4+ ICsgICAgICAgaTkxNV9nZW1fb2JqZWN0X3VubG9jayhvYmopOwo+IExvb2tzIGxpa2UgdGhlIGlz X3Nocmlua2FibGUgY2hhbmdlIHdhcyBzcXVhc2hlZCBpbiB0aGUgbmV4dCBwYXRjaC4KPiBEb2Vz bid0IHJlYWxseSBtYXR0ZXIsCj4gUmV2aWV3ZWQtYnk6IE1hdHRoZXcgQXVsZCA8bWF0dGhldy5h dWxkQGludGVsLmNvbT4KCgpVZ2guIEknbGwgZml4IHRoYXQgdXAgZm9yIGEgZmluYWwgdmVyc2lv biBhbmQgYXR0YWNoIHlvdXIgUi1CLgoKVGhhbmtzLAoKVGhvbWFzCgoKPgo+PiArb3V0Ogo+PiAg ICAgICAgICAvKiBpOTE1IHdhbnRzIC1FTlhJTyB3aGVuIG91dCBvZiBtZW1vcnkgcmVnaW9uIHNw YWNlLiAqLwo+PiAgICAgICAgICByZXR1cm4gKHJldCA9PSAtRU5PU1BDKSA/IC1FTlhJTyA6IHJl dDsKPj4gICB9Cj4+IC0tCj4+IDIuMzEuMQo+Pgo+PiBfX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fXwo+PiBJbnRlbC1nZnggbWFpbGluZyBsaXN0Cj4+IEludGVs LWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKPj4gaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5v cmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngKX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlz dHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4v bGlzdGluZm8vaW50ZWwtZ2Z4Cg==