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From: Alex Shi <alex.shi@linux.alibaba.com>
To: Yanteng Si <siyanteng@loongson.cn>, Jonathan Corbet <corbet@lwn.net>
Cc: Harry Wei <harryxiyou@gmail.com>,
	Yanteng Si <siyanteng01@gmail.com>,
	linux-doc@vger.kernel.org, realpuyuwang@gmail.com,
	Huacai Chen <chenhuacai@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH v2 1/5] docs/zh_CN:add riscv boot-image-header.rst translation
Date: Wed, 24 Feb 2021 11:41:47 +0800	[thread overview]
Message-ID: <c242fdec-71a1-feca-1840-457cd7e4fe89@linux.alibaba.com> (raw)
In-Reply-To: <20210224031149.15179-2-siyanteng@loongson.cn>

Reviewed-by: Alex Shi <alex.shi@linux.alibaba.com>

在 2021/2/24 上午11:11, Yanteng Si 写道:
> This patch translates Documentation/riscv/boot-image-header.rst intoChinese.
> 
> Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
> ---
>  .../zh_CN/riscv/boot-image-header.rst         | 67 +++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 Documentation/translations/zh_CN/riscv/boot-image-header.rst
> 
> diff --git a/Documentation/translations/zh_CN/riscv/boot-image-header.rst b/Documentation/translations/zh_CN/riscv/boot-image-header.rst
> new file mode 100644
> index 000000000000..3e9a9abb5d6f
> --- /dev/null
> +++ b/Documentation/translations/zh_CN/riscv/boot-image-header.rst
> @@ -0,0 +1,67 @@
> +.. include:: ../disclaimer-zh_CN.rst
> +
> +:Original: :doc:`../../../riscv/boot-image-header`
> +:Translator: Yanteng Si <siyanteng@loongson.cn>
> +
> +.. _cn_boot-image-header.rst:
> +
> +
> +==========================
> +RISC-V Linux启动镜像文件头
> +==========================
> +
> +:Author: Atish Patra <atish.patra@wdc.com>
> +:Date:   20 May 2019
> +
> +此文档仅描述RISC-V Linux 启动文件头的详情。
> +
> +TODO:
> +  写一个完整的启动指南。
> +
> +在解压后的Linux内核镜像中存在以下64字节的文件头::
> +
> +	u32 code0;		  /* Executable code */
> +	u32 code1;		  /* Executable code */
> +	u64 text_offset;	  /* Image load offset, little endian */
> +	u64 image_size;		  /* Effective Image size, little endian */
> +	u64 flags;		  /* kernel flags, little endian */
> +	u32 version;		  /* Version of this header */
> +	u32 res1 = 0;		  /* Reserved */
> +	u64 res2 = 0;		  /* Reserved */
> +	u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
> +	u32 magic2 = 0x05435352;  /* Magic number 2, little endian, "RSC\x05" */
> +	u32 res3;		  /* Reserved for PE COFF offset */
> +
> +这种头格式与PE/COFF文件头兼容,并在很大程度上受到ARM64文件头的启发。因此,ARM64
> +和RISC-V文件头可以在未来合并为一个共同的头。
> +
> +注意
> +====
> +
> +- 将来也可以复用这个文件头,用来对RISC-V的EFI桩提供支持。为了使内核镜像如同一个
> +  EFI应用程序一样加载,EFI规范中规定在内核镜像的开始需要PE/COFF镜像文件头。为了
> +  支持EFI桩,应该用“MZ”魔术字符替换掉code0,并且res3(偏移量未0x3c)应指向PE/COFF
> +  文件头的其余部分.
> +
> +- 表示文件头的版本号的bit位域
> +
> +	==========  ==========
> +	Bits 0:15   次要  版本
> +	Bits 16:31  主要  版本
> +	==========  ==========
> +
> +  这保持了新旧版本之间的兼容性。
> +  当前版本被定义为0.2。
> +
> +- 从版本0.2开始,结构体成员“magic”就已经被弃用,在之后的版本中,可能会移除掉它。
> +  最初,该成员应该与ARM64头的“magic”成员匹配,但遗憾的是并没有。
> +  “magic2”成员代替“magic”成员与ARM64头相匹配。
> +
> +- 在当前的文件头,标志位域只剩下了一个。
> +
> +	=====  ==============================
> +	Bit 0  内核字节序。1 if BE, 0 if LE.
> +	=====  ==============================
> +
> +- 对于引导加载程序加载内核映像来说,image_size成员是强制性要写进文件头的,否则将引
> +  导失败。
> 

  reply	other threads:[~2021-02-24  3:42 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-24  3:11 [PATCH v2 0/5] docs/zh_CN:add riscv translation Yanteng Si
2021-02-24  3:11 ` [PATCH v2 1/5] docs/zh_CN:add riscv boot-image-header.rst translation Yanteng Si
2021-02-24  3:41   ` Alex Shi [this message]
2021-02-24  3:11 ` [PATCH v2 2/5] docs/zh_CN: add riscv features.rst translation Yanteng Si
2021-02-24  3:43   ` Alex Shi
2021-02-25  9:47     ` yanteng si
2021-02-24  3:11 ` [PATCH v2 3/5] docs/zh_CN: add riscv patch-acceptance.rst translation Yanteng Si
2021-02-24  3:41   ` Alex Shi
2021-02-24  3:11 ` [PATCH v2 4/5] docs/zh_CN: add riscv pmu.rst translation Yanteng Si
2021-02-24  3:43   ` Alex Shi
2021-02-24  3:11 ` [PATCH v2 5/5] docs/zh_CN: add riscv index.rst translation Yanteng Si
2021-02-24  3:43   ` Alex Shi

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