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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 6/7] drm/i915/perf: add interrupt enabling parameter
Date: Tue, 10 Mar 2020 22:57:58 +0200	[thread overview]
Message-ID: <c2c8c8c9-2b6b-33ca-adf7-f6a9cbd6541f@intel.com> (raw)
In-Reply-To: <20200310200834.GE9651@orsosgc001.amr.corp.intel.com>

On 10/03/2020 22:08, Umesh Nerlige Ramappa wrote:
> On Tue, Mar 03, 2020 at 02:19:04PM -0800, Umesh Nerlige Ramappa wrote:
>> From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>
>> This let's the application choose to be driven by the interrupt
>> mechanism of the HW. In conjuction with long periods for checks for
>> the availability of data on the CPU, this can reduce the CPU load when
>> doing capture of OA data.
>>
>> v2: Version the new parameter (Joonas)
>> v3: Rebase (Umesh)
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_perf.c | 58 +++++++++++++++++++++++---------
>> include/uapi/drm/i915_drm.h      | 10 ++++++
>> 2 files changed, 53 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_perf.c 
>> b/drivers/gpu/drm/i915/i915_perf.c
>> index 502961da840d..ab41cba85b40 100644
>> --- a/drivers/gpu/drm/i915/i915_perf.c
>> +++ b/drivers/gpu/drm/i915/i915_perf.c
>> @@ -252,7 +252,7 @@
>>  * oa_buffer_check().
>>  *
>>  * Most of the implementation details for this workaround are in
>> - * oa_buffer_check_unlocked() and _append_oa_reports()
>> + * oa_buffer_check() and _append_oa_reports()
>>  *
>>  * Note for posterity: previously the driver used to define an 
>> effective tail
>>  * pointer that lagged the real pointer by a 'tail margin' measured 
>> in bytes
>> @@ -447,8 +447,9 @@ static u32 gen7_oa_hw_tail_read(struct 
>> i915_perf_stream *stream)
>> }
>>
>> /**
>> - * oa_buffer_check_unlocked - check for data and update tail ptr state
>> + * oa_buffer_check - check for data and update tail ptr state
>>  * @stream: i915 stream instance
>> + * @lock: whether to take the oa_buffer spin lock
>>  *
>>  * This is either called via fops (for blocking reads in user ctx) or 
>> the poll
>>  * check hrtimer (atomic ctx) to check the OA buffer tail pointer and 
>> check
>> @@ -470,8 +471,9 @@ static u32 gen7_oa_hw_tail_read(struct 
>> i915_perf_stream *stream)
>>  *
>>  * Returns: %true if the OA buffer contains data, else %false
>>  */
>> -static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>> +static bool oa_buffer_check(struct i915_perf_stream *stream, bool lock)
>
> Hi Lionel,
>
> All callers seem to set the lock to true when calling 
> oa_buffer_check().  Do you recall why the parameter was introduced?  
> If not, we probably want to remove this change.
>
> Thanks,
> Umesh


Err... Sorry, I don't remember.

It's probably a leftover the initial iteration where I was trying to get 
the OA head/tail register from the interrupt.

I guess you can drop that param and leave the function with the 
_unlocked prefix.


Thanks,


-Lionel


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  reply	other threads:[~2020-03-10 20:58 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-03 22:18 [Intel-gfx] [PATCH 0/7] drm/i915/perf: add OA interrupt support Umesh Nerlige Ramappa
2020-03-03 22:18 ` [Intel-gfx] [PATCH 1/7] drm/i915/perf: rework aging tail workaround Umesh Nerlige Ramappa
2020-03-03 22:19 ` [Intel-gfx] [PATCH 2/7] drm/i915/perf: move pollin setup to non hw specific code Umesh Nerlige Ramappa
2020-03-03 22:19 ` [Intel-gfx] [PATCH 3/7] drm/i915/perf: only append status when data is available Umesh Nerlige Ramappa
2020-03-03 22:19 ` [Intel-gfx] [PATCH 4/7] drm/i915/perf: add new open param to configure polling of OA buffer Umesh Nerlige Ramappa
2020-03-12 19:27   ` Dixit, Ashutosh
2020-03-12 20:37     ` Lionel Landwerlin
2020-03-12 22:20       ` Dixit, Ashutosh
2020-03-12 23:10       ` Umesh Nerlige Ramappa
2020-03-03 22:19 ` [Intel-gfx] [PATCH 5/7] drm/i915: handle interrupts from the OA unit Umesh Nerlige Ramappa
2020-03-03 22:19 ` [Intel-gfx] [PATCH 6/7] drm/i915/perf: add interrupt enabling parameter Umesh Nerlige Ramappa
2020-03-04  5:47   ` Dixit, Ashutosh
2020-03-04  8:55     ` Lionel Landwerlin
2020-03-10 20:08   ` Umesh Nerlige Ramappa
2020-03-10 20:57     ` Lionel Landwerlin [this message]
2020-03-03 22:19 ` [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl Umesh Nerlige Ramappa
2020-03-04  5:48   ` Dixit, Ashutosh
2020-03-04  8:52     ` Lionel Landwerlin
2020-03-05  5:56       ` Dixit, Ashutosh
2020-03-09 19:51         ` Umesh Nerlige Ramappa
2020-03-10 20:44           ` Lionel Landwerlin
2020-03-11  3:05             ` Dixit, Ashutosh
2020-03-09 21:15         ` Umesh Nerlige Ramappa
2020-03-04  2:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: add OA interrupt support (rev5) Patchwork
2020-03-04  2:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-03-04  3:13 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-04  3:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-04 19:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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