From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 04 Mar 2019 06:28:16 -0000 Received: from mx1.redhat.com ([209.132.183.28]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1h0h5B-0001jK-Qm for speck@linutronix.de; Mon, 04 Mar 2019 07:28:14 +0100 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 41CA630EBE63 for ; Mon, 4 Mar 2019 06:28:07 +0000 (UTC) Received: from tonnant.bos.jonmasters.org (ovpn-120-248.rdu2.redhat.com [10.10.120.248]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D45356013F for ; Mon, 4 Mar 2019 06:28:06 +0000 (UTC) References: <20190301214738.281554861@linutronix.de> <20190301214847.717678756@linutronix.de> From: Jon Masters Message-ID: Date: Mon, 4 Mar 2019 01:28:05 -0500 MIME-Version: 1.0 In-Reply-To: <20190301214847.717678756@linutronix.de> Subject: [MODERATED] Encrypted Message Content-Type: multipart/mixed; boundary="ag9gemVqnHC0YYd5lIFETyCf63kra5SkF"; protected-headers="v1" To: speck@linutronix.de List-ID: This is an OpenPGP/MIME encrypted message (RFC 4880 and 3156) --ag9gemVqnHC0YYd5lIFETyCf63kra5SkF Content-Type: text/rfc822-headers; protected-headers="v1" Content-Disposition: inline From: Jon Masters To: speck for Thomas Gleixner Subject: Re: [patch V6 06/14] MDS basics 6 --ag9gemVqnHC0YYd5lIFETyCf63kra5SkF Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 3/1/19 4:47 PM, speck for Thomas Gleixner wrote: > Provide a inline function with the assembly magic. The argument of the = VERW > instruction must be a memory operand as documented: >=20 > "MD_CLEAR enumerates that the memory-operand variant of VERW (for > example, VERW m16) has been extended to also overwrite buffers affec= ted > by MDS. This buffer overwriting functionality is not guaranteed for = the > register operand variant of VERW." >=20 > Documentation also recommends to use a writable data segment selector: >=20 > "The buffer overwriting occurs regardless of the result of the VERW > permission check, as well as when the selector is null or causes a > descriptor load segment violation. However, for lowest latency we > recommend using a selector that indicates a valid writable data > segment." Note that we raised this again with Intel last week amid Andrew's results and they are going to get back to us if this guidance changes as a result of further measurements on their end. It's a few cycles difference in the Coffeelake case, but it could always be higher. Jon. --=20 Computer Architect | Sent with my Fedora powered laptop --ag9gemVqnHC0YYd5lIFETyCf63kra5SkF--