From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: [PATCH 10/11] arm64: dts: renesas: initial Condor board device tree Date: Fri, 2 Feb 2018 21:46:55 +0300 Message-ID: References: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <46fca582-220d-e5a7-62cd-2fc77a29846b-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org> Content-Language: en-MW Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring , Catalin Marinas , Will Deacon , Simon Horman , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Mark Rutland , Magnus Damm , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org Add the initial device tree for the R8A77980 SoC based Condor board. The board has 1 debug serial port (SCIF0); include support for it, so that the serial console can work. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov --- arch/arm64/boot/dts/renesas/Makefile | 1 arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 46 ++++++++++++++++++++++++ 2 files changed, 47 insertions(+) Index: renesas/arch/arm64/boot/dts/renesas/Makefile =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/Makefile +++ renesas/arch/arm64/boot/dts/renesas/Makefile @@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-sa dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb +dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts =================================================================== --- /dev/null +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Condor board + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + */ + +/dts-v1/; +#include "r8a77980.dtsi" + +/ { + model = "Renesas Condor board based on r8a77980"; + compatible = "renesas,condor", "renesas,r8a77980"; + + aliases { + serial0 = &scif0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&scif0 { + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-f67.google.com ([209.85.215.67]:33907 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752809AbeBBSq6 (ORCPT ); Fri, 2 Feb 2018 13:46:58 -0500 Received: by mail-lf0-f67.google.com with SMTP id k19so32949412lfj.1 for ; Fri, 02 Feb 2018 10:46:57 -0800 (PST) Subject: [PATCH 10/11] arm64: dts: renesas: initial Condor board device tree From: Sergei Shtylyov To: Rob Herring , Catalin Marinas , Will Deacon , Simon Horman , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Mark Rutland , Magnus Damm , linux-arm-kernel@lists.infradead.org References: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com> Message-ID: Date: Fri, 2 Feb 2018 21:46:55 +0300 MIME-Version: 1.0 In-Reply-To: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-MW Content-Transfer-Encoding: 7bit Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Add the initial device tree for the R8A77980 SoC based Condor board. The board has 1 debug serial port (SCIF0); include support for it, so that the serial console can work. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov --- arch/arm64/boot/dts/renesas/Makefile | 1 arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 46 ++++++++++++++++++++++++ 2 files changed, 47 insertions(+) Index: renesas/arch/arm64/boot/dts/renesas/Makefile =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/Makefile +++ renesas/arch/arm64/boot/dts/renesas/Makefile @@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-sa dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb +dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts =================================================================== --- /dev/null +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Condor board + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + */ + +/dts-v1/; +#include "r8a77980.dtsi" + +/ { + model = "Renesas Condor board based on r8a77980"; + compatible = "renesas,condor", "renesas,r8a77980"; + + aliases { + serial0 = &scif0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&scif0 { + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; From mboxrd@z Thu Jan 1 00:00:00 1970 From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov) Date: Fri, 2 Feb 2018 21:46:55 +0300 Subject: [PATCH 10/11] arm64: dts: renesas: initial Condor board device tree In-Reply-To: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com> References: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add the initial device tree for the R8A77980 SoC based Condor board. The board has 1 debug serial port (SCIF0); include support for it, so that the serial console can work. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov --- arch/arm64/boot/dts/renesas/Makefile | 1 arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 46 ++++++++++++++++++++++++ 2 files changed, 47 insertions(+) Index: renesas/arch/arm64/boot/dts/renesas/Makefile =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/Makefile +++ renesas/arch/arm64/boot/dts/renesas/Makefile @@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-sa dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb +dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts =================================================================== --- /dev/null +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Condor board + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + */ + +/dts-v1/; +#include "r8a77980.dtsi" + +/ { + model = "Renesas Condor board based on r8a77980"; + compatible = "renesas,condor", "renesas,r8a77980"; + + aliases { + serial0 = &scif0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory at 48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&scif0 { + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +};