From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70C00C433E2 for ; Thu, 14 May 2020 13:00:30 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C124020728 for ; Thu, 14 May 2020 13:00:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C124020728 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=csgroup.eu Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49NBV25PFczDqmF for ; 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Thu, 14 May 2020 14:57:49 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 68C9B8B845; Thu, 14 May 2020 14:57:51 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id iTGl6KQzQe-B; Thu, 14 May 2020 14:57:51 +0200 (CEST) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id C94E98B849; Thu, 14 May 2020 14:57:50 +0200 (CEST) Subject: Re: [PATCH v8 23/30] powerpc: Add prefixed instructions to instruction data type To: Alistair Popple References: <20200506034050.24806-1-jniethe5@gmail.com> <20200506034050.24806-24-jniethe5@gmail.com> <56ca6bcb-c719-a049-63b0-aae73023bde5@csgroup.eu> <1850220.JuIOMCfrUL@townsend> From: Christophe Leroy Message-ID: Date: Thu, 14 May 2020 14:57:50 +0200 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <1850220.JuIOMCfrUL@townsend> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: christophe.leroy@c-s.fr, Jordan Niethe , npiggin@gmail.com, bala24@linux.ibm.com, naveen.n.rao@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, dja@axtens.net Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Le 14/05/2020 à 14:06, Alistair Popple a écrit : > On Thursday, 14 May 2020 4:11:43 PM AEST Christophe Leroy wrote: >> @@ -249,7 +249,7 @@ int arch_prepare_optimized_kprobe(struct >> optimized_kprobe *op, struct kprobe *p) >>> * Fixup the template with instructions to: >>> * 1. load the address of the actual probepoint >>> */ >>> - patch_imm64_load_insns((unsigned long)op, buff + TMPL_OP_IDX); >>> + patch_imm64_load_insns((unsigned long)op, 3, buff + TMPL_OP_IDX); >>> >>> /* >>> * 2. branch to optimized_callback() and emulate_step() >>> @@ -282,7 +282,11 @@ int arch_prepare_optimized_kprobe(struct >>> optimized_kprobe *op, struct kprobe *p) /* >>> * 3. load instruction to be emulated into relevant register, and >>> */ >>> - patch_imm32_load_insns(*p->ainsn.insn, buff + TMPL_INSN_IDX); >>> + temp = ppc_inst_read((struct ppc_inst *)p->ainsn.insn); >>> + patch_imm64_load_insns(ppc_inst_val(temp) | >>> + ((u64)ppc_inst_suffix(temp) << 32), >>> + 4, >> >> So now we are also using r4 ? Any explanation somewhere on the way it >> works ? This change seems unrelated to this patch, nothing in the >> description about it. Can we suddenly use a new register without problem ? > > Unless I missed something there is no change in register usage here that I > could see. patch_imm32_load_insns() was/is hardcoded to use register r4. > Ah ... Euh ... Ok I missed the change from patch_imm32_load_insns() to patch_imm64_load_insns(), I'll check again.