From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751371AbdBFHAk (ORCPT ); Mon, 6 Feb 2017 02:00:40 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:36469 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750980AbdBFHAi (ORCPT ); Mon, 6 Feb 2017 02:00:38 -0500 From: Maxime Ripard To: Chen-Yu Tsai , Maxime Ripard Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Date: Sun, 5 Feb 2017 19:49:41 +0100 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The UART3 pin group for the CTS and RTS signals doesn't follow our usual pattern. Rename it so that it matches. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-r8-chip.dts | 2 +- arch/arm/boot/dts/sun5i.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index e86fa46fdd45..c9a18216674a 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -281,7 +281,7 @@ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins_a>, - <&uart3_pins_cts_rts_a>; + <&uart3_cts_rts_pins_a>; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index cd951e2cdbe7..d4888e0a0a13 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -351,7 +351,7 @@ function = "uart3"; }; - uart3_pins_cts_rts_a: uart3-cts-rts@0 { + uart3_cts_rts_pins_a: uart3-cts-rts@0 { pins = "PG11", "PG12"; function = "uart3"; }; -- git-series 0.8.11 From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@free-electrons.com (Maxime Ripard) Date: Sun, 5 Feb 2017 19:49:41 +0100 Subject: [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins In-Reply-To: References: Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The UART3 pin group for the CTS and RTS signals doesn't follow our usual pattern. Rename it so that it matches. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-r8-chip.dts | 2 +- arch/arm/boot/dts/sun5i.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index e86fa46fdd45..c9a18216674a 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -281,7 +281,7 @@ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins_a>, - <&uart3_pins_cts_rts_a>; + <&uart3_cts_rts_pins_a>; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index cd951e2cdbe7..d4888e0a0a13 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -351,7 +351,7 @@ function = "uart3"; }; - uart3_pins_cts_rts_a: uart3-cts-rts at 0 { + uart3_cts_rts_pins_a: uart3-cts-rts at 0 { pins = "PG11", "PG12"; function = "uart3"; }; -- git-series 0.8.11