From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50FF2C433EF for ; Tue, 1 Mar 2022 09:09:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231772AbiCAJKT (ORCPT ); Tue, 1 Mar 2022 04:10:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229825AbiCAJKT (ORCPT ); Tue, 1 Mar 2022 04:10:19 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8666E41FAE for ; Tue, 1 Mar 2022 01:09:38 -0800 (PST) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nOyVZ-0001Oq-9j; Tue, 01 Mar 2022 10:09:25 +0100 Message-ID: Subject: Re: [PATCH v3 5/7] arm64: dts: imx8mp: add HSIO power-domains From: Lucas Stach To: Laurent Pinchart Cc: Shawn Guo , Rob Herring , Pengutronix Kernel Team , NXP Linux Team , Marek Vasut , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de Date: Tue, 01 Mar 2022 10:09:23 +0100 In-Reply-To: References: <20220228201731.3330192-1-l.stach@pengutronix.de> <20220228201731.3330192-6-l.stach@pengutronix.de> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Am Dienstag, dem 01.03.2022 um 09:13 +0200 schrieb Laurent Pinchart: > Hi Lucas, > > Thank you for the patch. > > On Mon, Feb 28, 2022 at 09:17:29PM +0100, Lucas Stach wrote: > > This adds the GPC and HSIO blk-ctrl nodes providing power control for > > the high-speed (USB and PCIe) IOs. > > > > Signed-off-by: Lucas Stach > > Reviewed-by: Laurent Pinchart > > --- > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 71 +++++++++++++++++++++-- > > 1 file changed, 65 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > index 6b840c05dd77..69e533add539 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > @@ -4,6 +4,7 @@ > > */ > > > > #include > > +#include > > #include > > #include > > #include > > @@ -475,6 +476,44 @@ src: reset-controller@30390000 { > > interrupts = ; > > #reset-cells = <1>; > > }; > > + > > + gpc: gpc@303a0000 { > > + compatible = "fsl,imx8mp-gpc"; > > + reg = <0x303a0000 0x1000>; > > + interrupt-parent = <&gic>; > > + interrupt-controller; > > + #interrupt-cells = <3>; > > + > > + pgc { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + pgc_pcie_phy: power-domain@1 { > > + #power-domain-cells = <0>; > > + reg = ; > > + }; > > + > > + pgc_usb1_phy: power-domain@2 { > > + #power-domain-cells = <0>; > > + reg = ; > > + }; > > + > > + pgc_usb2_phy: power-domain@3 { > > + #power-domain-cells = <0>; > > + reg = ; > > + }; > > + > > + pgc_hsiomix: power-domains@17 { > > + #power-domain-cells = <0>; > > + reg = ; > > + clocks = <&clk IMX8MP_CLK_HSIO_AXI>, > > + <&clk IMX8MP_CLK_HSIO_ROOT>; > > + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; > > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; > > + assigned-clock-rates = <500000000>; > > + }; > > + }; > > + }; > > }; > > > > aips2: bus@30400000 { > > @@ -892,6 +931,28 @@ eqos: ethernet@30bf0000 { > > }; > > }; > > > > + aips4 { > > I think this should be > > aips4: bus@32c00000 { > > to match the other buses. Apart from that, the patch looks good, my Rb > tag still applies. Urgh, apparently one shouldn't do those reworks too late in the evening. :/ Shawn, would you be willing to fix this up while applying, or should I resend the series? Regards, Lucas > > > + compatible = "fsl,aips-bus", "simple-bus"; > > + reg = <0x32c00000 0x400000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + hsio_blk_ctrl: blk-ctrl@32f10000 { > > + compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon"; > > + reg = <0x32f10000 0x24>; > > + clocks = <&clk IMX8MP_CLK_USB_ROOT>, > > + <&clk IMX8MP_CLK_PCIE_ROOT>; > > + clock-names = "usb", "pcie"; > > + power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>, > > + <&pgc_usb1_phy>, <&pgc_usb2_phy>, > > + <&pgc_hsiomix>, <&pgc_pcie_phy>; > > + power-domain-names = "bus", "usb", "usb-phy1", > > + "usb-phy2", "pcie", "pcie-phy"; > > + #power-domain-cells = <1>; > > + }; > > + }; > > + > > gic: interrupt-controller@38800000 { > > compatible = "arm,gic-v3"; > > reg = <0x38800000 0x10000>, > > @@ -915,6 +976,7 @@ usb3_phy0: usb-phy@381f0040 { > > clock-names = "phy"; > > assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; > > assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY1>; > > #phy-cells = <0>; > > status = "disabled"; > > }; > > @@ -926,6 +988,7 @@ usb3_0: usb@32f10100 { > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "hsio", "suspend"; > > interrupts = ; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>; > > #address-cells = <1>; > > #size-cells = <1>; > > dma-ranges = <0x40000000 0x40000000 0xc0000000>; > > @@ -939,9 +1002,6 @@ usb_dwc3_0: usb@38100000 { > > <&clk IMX8MP_CLK_USB_CORE_REF>, > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "bus_early", "ref", "suspend"; > > - assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; > > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; > > - assigned-clock-rates = <500000000>; > > interrupts = ; > > phys = <&usb3_phy0>, <&usb3_phy0>; > > phy-names = "usb2-phy", "usb3-phy"; > > @@ -957,6 +1017,7 @@ usb3_phy1: usb-phy@382f0040 { > > clock-names = "phy"; > > assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; > > assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY2>; > > #phy-cells = <0>; > > }; > > > > @@ -967,6 +1028,7 @@ usb3_1: usb@32f10108 { > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "hsio", "suspend"; > > interrupts = ; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>; > > #address-cells = <1>; > > #size-cells = <1>; > > dma-ranges = <0x40000000 0x40000000 0xc0000000>; > > @@ -980,9 +1042,6 @@ usb_dwc3_1: usb@38200000 { > > <&clk IMX8MP_CLK_USB_CORE_REF>, > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "bus_early", "ref", "suspend"; > > - assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; > > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; > > - assigned-clock-rates = <500000000>; > > interrupts = ; > > phys = <&usb3_phy1>, <&usb3_phy1>; > > phy-names = "usb2-phy", "usb3-phy"; > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 411BDC433EF for ; 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Tue, 01 Mar 2022 09:09:42 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nOyVm-00FmE2-JJ for linux-arm-kernel@lists.infradead.org; Tue, 01 Mar 2022 09:09:40 +0000 Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nOyVZ-0001Oq-9j; Tue, 01 Mar 2022 10:09:25 +0100 Message-ID: Subject: Re: [PATCH v3 5/7] arm64: dts: imx8mp: add HSIO power-domains From: Lucas Stach To: Laurent Pinchart Cc: Shawn Guo , Rob Herring , Pengutronix Kernel Team , NXP Linux Team , Marek Vasut , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de Date: Tue, 01 Mar 2022 10:09:23 +0100 In-Reply-To: References: <20220228201731.3330192-1-l.stach@pengutronix.de> <20220228201731.3330192-6-l.stach@pengutronix.de> User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220301_010938_669443_B8C867E3 X-CRM114-Status: GOOD ( 22.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am Dienstag, dem 01.03.2022 um 09:13 +0200 schrieb Laurent Pinchart: > Hi Lucas, > > Thank you for the patch. > > On Mon, Feb 28, 2022 at 09:17:29PM +0100, Lucas Stach wrote: > > This adds the GPC and HSIO blk-ctrl nodes providing power control for > > the high-speed (USB and PCIe) IOs. > > > > Signed-off-by: Lucas Stach > > Reviewed-by: Laurent Pinchart > > --- > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 71 +++++++++++++++++++++-- > > 1 file changed, 65 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > index 6b840c05dd77..69e533add539 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > @@ -4,6 +4,7 @@ > > */ > > > > #include > > +#include > > #include > > #include > > #include > > @@ -475,6 +476,44 @@ src: reset-controller@30390000 { > > interrupts = ; > > #reset-cells = <1>; > > }; > > + > > + gpc: gpc@303a0000 { > > + compatible = "fsl,imx8mp-gpc"; > > + reg = <0x303a0000 0x1000>; > > + interrupt-parent = <&gic>; > > + interrupt-controller; > > + #interrupt-cells = <3>; > > + > > + pgc { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + pgc_pcie_phy: power-domain@1 { > > + #power-domain-cells = <0>; > > + reg = ; > > + }; > > + > > + pgc_usb1_phy: power-domain@2 { > > + #power-domain-cells = <0>; > > + reg = ; > > + }; > > + > > + pgc_usb2_phy: power-domain@3 { > > + #power-domain-cells = <0>; > > + reg = ; > > + }; > > + > > + pgc_hsiomix: power-domains@17 { > > + #power-domain-cells = <0>; > > + reg = ; > > + clocks = <&clk IMX8MP_CLK_HSIO_AXI>, > > + <&clk IMX8MP_CLK_HSIO_ROOT>; > > + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; > > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; > > + assigned-clock-rates = <500000000>; > > + }; > > + }; > > + }; > > }; > > > > aips2: bus@30400000 { > > @@ -892,6 +931,28 @@ eqos: ethernet@30bf0000 { > > }; > > }; > > > > + aips4 { > > I think this should be > > aips4: bus@32c00000 { > > to match the other buses. Apart from that, the patch looks good, my Rb > tag still applies. Urgh, apparently one shouldn't do those reworks too late in the evening. :/ Shawn, would you be willing to fix this up while applying, or should I resend the series? Regards, Lucas > > > + compatible = "fsl,aips-bus", "simple-bus"; > > + reg = <0x32c00000 0x400000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + hsio_blk_ctrl: blk-ctrl@32f10000 { > > + compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon"; > > + reg = <0x32f10000 0x24>; > > + clocks = <&clk IMX8MP_CLK_USB_ROOT>, > > + <&clk IMX8MP_CLK_PCIE_ROOT>; > > + clock-names = "usb", "pcie"; > > + power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>, > > + <&pgc_usb1_phy>, <&pgc_usb2_phy>, > > + <&pgc_hsiomix>, <&pgc_pcie_phy>; > > + power-domain-names = "bus", "usb", "usb-phy1", > > + "usb-phy2", "pcie", "pcie-phy"; > > + #power-domain-cells = <1>; > > + }; > > + }; > > + > > gic: interrupt-controller@38800000 { > > compatible = "arm,gic-v3"; > > reg = <0x38800000 0x10000>, > > @@ -915,6 +976,7 @@ usb3_phy0: usb-phy@381f0040 { > > clock-names = "phy"; > > assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; > > assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY1>; > > #phy-cells = <0>; > > status = "disabled"; > > }; > > @@ -926,6 +988,7 @@ usb3_0: usb@32f10100 { > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "hsio", "suspend"; > > interrupts = ; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>; > > #address-cells = <1>; > > #size-cells = <1>; > > dma-ranges = <0x40000000 0x40000000 0xc0000000>; > > @@ -939,9 +1002,6 @@ usb_dwc3_0: usb@38100000 { > > <&clk IMX8MP_CLK_USB_CORE_REF>, > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "bus_early", "ref", "suspend"; > > - assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; > > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; > > - assigned-clock-rates = <500000000>; > > interrupts = ; > > phys = <&usb3_phy0>, <&usb3_phy0>; > > phy-names = "usb2-phy", "usb3-phy"; > > @@ -957,6 +1017,7 @@ usb3_phy1: usb-phy@382f0040 { > > clock-names = "phy"; > > assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; > > assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY2>; > > #phy-cells = <0>; > > }; > > > > @@ -967,6 +1028,7 @@ usb3_1: usb@32f10108 { > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "hsio", "suspend"; > > interrupts = ; > > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>; > > #address-cells = <1>; > > #size-cells = <1>; > > dma-ranges = <0x40000000 0x40000000 0xc0000000>; > > @@ -980,9 +1042,6 @@ usb_dwc3_1: usb@38200000 { > > <&clk IMX8MP_CLK_USB_CORE_REF>, > > <&clk IMX8MP_CLK_USB_ROOT>; > > clock-names = "bus_early", "ref", "suspend"; > > - assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; > > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; > > - assigned-clock-rates = <500000000>; > > interrupts = ; > > phys = <&usb3_phy1>, <&usb3_phy1>; > > phy-names = "usb2-phy", "usb3-phy"; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel