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[108.18.248.138]) by smtp.googlemail.com with ESMTPSA id i1-20020a05620a150100b006a5d4f32e5dsm589946qkk.128.2022.05.26.20.41.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 26 May 2022 20:41:29 -0700 (PDT) Subject: Re: imx8mm eLCDIF clock To: Tommaso Merciai Cc: u-boot@lists.denx.de, Lukasz Majewski References: <20220421064805.GA2335@tom-ThinkPad-T14s-Gen-2i> <20220422063920.GF2335@tom-ThinkPad-T14s-Gen-2i> From: Sean Anderson Message-ID: Date: Thu, 26 May 2022 23:41:29 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20220422063920.GF2335@tom-ThinkPad-T14s-Gen-2i> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 4/22/22 2:39 AM, Tommaso Merciai wrote: > On Thu, Apr 21, 2022 at 08:09:59PM -0400, Sean Anderson wrote: >> On 4/21/22 2:48 AM, Tommaso Merciai wrote: >>> Hi, >>> I'm working on drivers/clk/imx/clk-imx8mm.c to port and bring up eLCDIF >>> clocks. After port all necessary clocks needed by eLCDIF I found that >>> IMX8MM_VIDEO_PLL1 clock is not enabled and need the following code to enable >>> it at the end of the clk-imx8mm probe: >>> >>> struct clk *clkp; >>> >>> clk_get_by_id(IMX8MM_VIDEO_PLL1, &clkp); >>> clk_set_rate(clkp, 594000000UL); >>> clk_enable(clkp); >>> >>> What do you think about this solution? >>> There is a more standard way to do this? >> >> PLL1 should be a parent of one of the clocks required by the eLCDIF. That clock >> should call clk_enable() on PLL1 when it is enabled itself. If you want to set >> a specific rate, you can do that with assigned-clock-rates in either the clock's >> DT node, or the eLCDIF's DT node. > > Hi Sean, > Thanks for your suggestion, I need only to enable it, I have already > assign the right rate from dts. The doubt at this point is: it's right call clk_enable > from clk-imx8mm.c? > I think yes because it handle by "fsl,imx8mm-ccm" > driver, maybe protected by CONFIG_DM_VIDEO could be a good solution. > Let me know. I don't think so. Generally whatever uses the clock (e.g. your video driver) will call clk_enable, and CCF should propegate that enable up the clock tree. --Sean