From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38830) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g89tM-0008E8-8x for qemu-devel@nongnu.org; Thu, 04 Oct 2018 16:06:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g89tI-0007gG-6R for qemu-devel@nongnu.org; Thu, 04 Oct 2018 16:06:36 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:31189) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g89tE-0007bx-AM for qemu-devel@nongnu.org; Thu, 04 Oct 2018 16:06:30 -0400 From: Alistair Francis Date: Thu, 4 Oct 2018 20:06:18 +0000 Message-ID: References: In-Reply-To: Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: [Qemu-devel] [PATCH v5 1/5] hw/riscv/virt: Increase the number of interrupts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" , "mjc@sifive.com" Cc: Alistair Francis , "alistair23@gmail.com" , "stephen@eideticom.com" , "palmer@sifive.com" Increase the number of interrupts to match the HiFive Unleashed board. Signed-off-by: Alistair Francis --- include/hw/riscv/virt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 91163d6cbf..7cb2742070 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -45,7 +45,7 @@ enum { UART0_IRQ =3D 10, VIRTIO_IRQ =3D 1, /* 1 to 8 */ VIRTIO_COUNT =3D 8, - VIRTIO_NDEV =3D 10 + VIRTIO_NDEV =3D 0x35 }; =20 enum { --=20 2.17.1