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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Roger Pau Monne <roger.pau@citrix.com>,
	Wei Liu <wei.liu2@citrix.com>,
	Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH 04/11] x86: Fix calculation of %dr6/7 reserved bits
Date: Wed, 6 Jun 2018 15:50:06 +0100	[thread overview]
Message-ID: <c7355764-8cc2-9c57-c3e0-2cd3bf740ffd@citrix.com> (raw)
In-Reply-To: <5B17ECC802000078001C8CEC@prv1-mh.provo.novell.com>

On 06/06/18 15:16, Jan Beulich wrote:
>> +    dr6 |= 0xfffe0ff0 | (rtm ? 0 : X86_DR6_RTM);
>> +    dr6 &= 0xffffefff;
> I'm not overly happy with this move to literal numbers. Could we
> at least meet in the middle and adjust the first line to
>
>     dr6 |= X86_DR6_DEFAULT & ~(rtm ? 0 : X86_DR6_RTM);
>
> ? Even the second line, it doesn't look unreasonable to me to
> accompany the other X86_DR6_* values you introduce with
> X86_DR6_MBZ (or some such, if you dislike this name). Of course
> then for the first line using X86_DR6_MBS would also be an option,
> allowing you to retain the | (which documentation-wise might be
> slightly better than the & ~()).

At the moment, every single use of DR_*_RESERVED_* in the entire
codebase is buggy, although this is admittedly a side effect of the
introduction of RTM (and that the advice given the Intel manual has
caused software not to be forwards compatible to the introduction of
RTM.  I've also arranged for that advice to be fixed.)

Irrespective, the constants are now simply appropriate to express how
the reserved bit behaviour works, which is why I'm removing them and
introducing these functions instead.

As for naked numbers, they are like this because its the clearest I
could make the code.  Hiding these behind defines makes it harder to
cross reference with the comment.

An alternative might be to go for an ARM approach using GENMASK()/BIT(),
but I'm not a fan of those because it introduces more confusion as to
where the boundaries of the mask lie.

Like you, I'm not a fan of naked numbers, but in this instance, I chose
them because I think they are the least bad option available.

~Andrew

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  reply	other threads:[~2018-06-06 14:50 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-04 13:59 [PATCH 00/11] Fixes to debugging facilities Andrew Cooper
2018-06-04 13:59 ` [PATCH 01/11] x86/svm Fixes and cleanup to svm_inject_event() Andrew Cooper
2018-06-06 13:37   ` Jan Beulich
2018-07-16 13:33     ` Andrew Cooper
2018-07-17  2:01       ` Boris Ostrovsky
2018-06-04 13:59 ` [PATCH 02/11] x86/vmx: Don't clobber %dr6 while debugging state is lazy Andrew Cooper
2018-06-06 10:16   ` Roger Pau Monné
2018-06-06 13:50   ` Jan Beulich
2018-06-06 14:16     ` Andrew Cooper
2018-06-07 11:05       ` Jan Beulich
2018-06-08 15:58         ` Andrew Cooper
2018-06-08 16:10           ` Jan Beulich
2018-07-17  9:28   ` Andrew Cooper
2018-07-19  2:14     ` Tian, Kevin
2018-06-04 13:59 ` [PATCH 03/11] x86: Initialise debug registers correctly Andrew Cooper
2018-06-06 10:34   ` Roger Pau Monné
2018-06-08 15:23     ` Andrew Cooper
2018-06-06 13:56   ` Jan Beulich
2018-06-08 15:42     ` Andrew Cooper
2018-06-08 16:14       ` Jan Beulich
2018-06-04 13:59 ` [PATCH 04/11] x86: Fix calculation of %dr6/7 reserved bits Andrew Cooper
2018-06-06 14:16   ` Jan Beulich
2018-06-06 14:50     ` Andrew Cooper [this message]
2018-06-06 14:52       ` Andrew Cooper
2018-06-06 15:11       ` Jan Beulich
2018-06-06 15:49   ` Roger Pau Monné
2018-06-06 15:59     ` Andrew Cooper
2018-06-06 17:36       ` Roger Pau Monné
2018-06-04 13:59 ` [PATCH 05/11] x86/emul: Unfold %cr4.de handling in x86emul_read_dr() Andrew Cooper
2018-06-06 14:20   ` Jan Beulich
2018-06-08 16:03     ` Andrew Cooper
2018-06-08 16:16       ` Jan Beulich
2018-06-06 15:54   ` Roger Pau Monné
2018-06-04 13:59 ` [PATCH 06/11] x86: Reorganise and rename debug register fields in struct vcpu Andrew Cooper
2018-06-06 15:00   ` Jan Beulich
2018-06-06 15:21     ` Andrew Cooper
2018-06-07 10:59       ` Jan Beulich
2018-06-06 16:22   ` Roger Pau Monné
2018-06-04 13:59 ` [PATCH 07/11] x86/emul: Add pending_dbg field to x86_event Andrew Cooper
2018-06-06 16:46   ` Roger Pau Monné
2018-06-06 16:50     ` Andrew Cooper
2018-06-06 17:03       ` Roger Pau Monné
2018-06-08 12:34   ` Jan Beulich
2018-06-08 12:48     ` Andrew Cooper
2018-06-04 13:59 ` [PATCH 08/11] x86/hvm: RFC - PROBABLY BROKEN - Defer all debugging/monitor actions to {svm, vmx}_inject_event() Andrew Cooper
2018-06-04 14:53   ` Razvan Cojocaru
2018-06-04 15:07     ` Razvan Cojocaru
2018-06-06 17:02   ` Roger Pau Monné
2018-06-08 13:00   ` Jan Beulich
2018-06-08 13:13     ` Andrew Cooper
2018-06-04 13:59 ` [PATCH 09/11] x86: Fix merging of new status bits into %dr6 Andrew Cooper
2018-06-06 17:09   ` Roger Pau Monné
2018-06-08 13:09   ` Jan Beulich
2018-06-04 13:59 ` [PATCH 10/11] x86/vmx: Work around VMEntry failure when Single Stepping in an STI shadow Andrew Cooper
2018-09-03 10:39   ` Ping VT-x: " Andrew Cooper
2018-09-04  5:27     ` Tian, Kevin
2018-06-04 13:59 ` [PATCH 11/11] x86/dbg: Cleanup of legacy dr6 constants Andrew Cooper
2018-06-06 17:10   ` Roger Pau Monné
2018-06-08 13:12   ` Jan Beulich
2018-06-04 15:39 ` [PATCH 00/11] Fixes to debugging facilities Andrew Cooper
2018-06-04 17:09   ` Razvan Cojocaru
2018-06-04 17:18     ` Andrew Cooper

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