Re: [PATCH] MIPS: OCTEON: Add OCTEON II build and configuration option

[Jiaxun Yang <jiaxun.yang@flygoat.com>]

在 2020/12/19 上午12:28, jiaqingtong97@163.com 写道:
> From: Jia Qingtong <jiaqingtong97@163.com>
>
> If building for OCTEON II only,we can select compiler options that
> give better code, but will not run on earlier chips.


I'd rather add a workaround Kconfig option and default y for it.
In case no other optimization can be enabled for OCTANE2, like

WORKAROUND_OCTANE_BARRIER

Thanks

- Jiaxun

>
> Signed-off-by: Jia Qingtong <jiaqingtong97@163.com>
> ---
>   arch/mips/cavium-octeon/Kconfig | 9 +++++++++
>   arch/mips/include/asm/sync.h    | 3 ++-
>   2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
> index 4984e462be30..3e0759142656 100644
> --- a/arch/mips/cavium-octeon/Kconfig
> +++ b/arch/mips/cavium-octeon/Kconfig
> @@ -1,6 +1,15 @@
>   # SPDX-License-Identifier: GPL-2.0
>   if CPU_CAVIUM_OCTEON
>   
> +config CAVIUM_OCTEON2
> +	bool "Build the kernel to be used only OCTEON II processor cores"
> +	default "n"
> +	help
> +		This option enables the generation of Octeon2 specific
> +		instructions by the compiler, resulting in a kernel that is
> +		more efficient, but that will not run on Octeon and
> +		OcteonPlus processor cores.
> +
>   config CAVIUM_CN63XXP1
>   	bool "Enable CN63XXP1 errata workarounds"
>   	default "n"
> diff --git a/arch/mips/include/asm/sync.h b/arch/mips/include/asm/sync.h
> index aabd097933fe..fda181c16c5f 100644
> --- a/arch/mips/include/asm/sync.h
> +++ b/arch/mips/include/asm/sync.h
> @@ -155,10 +155,11 @@
>    * effective barrier as noted by commit 6b07d38aaa52 ("MIPS: Octeon: Use
>    * optimized memory barrier primitives."). Here we specify that the affected
>    * sync instructions should be emitted twice.
> + * Cavium OcteonII and later CPUs has fixed above bug.
>    * Note that this expression is evaluated by the assembler (not the compiler),
>    * and that the assembler evaluates '==' as 0 or -1, not 0 or 1.
>    */
> -#ifdef CONFIG_CPU_CAVIUM_OCTEON
> +#if defined CONFIG_CPU_CAVIUM_OCTEON && !defined CONFIG_CAVIUM_OCTEON2
>   # define __SYNC_rpt(type)	(1 - (type == __SYNC_wmb))
>   #else
>   # define __SYNC_rpt(type)	1