From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40024C433F5 for ; Mon, 18 Apr 2022 10:21:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237702AbiDRKX6 (ORCPT ); Mon, 18 Apr 2022 06:23:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237668AbiDRKXs (ORCPT ); Mon, 18 Apr 2022 06:23:48 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 94007193E8; Mon, 18 Apr 2022 03:21:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1650277268; x=1681813268; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=IGoDwWhZ77ne+XcfC7kMLJQlZvJ7dGIgt25OU7boqsM=; b=JB+wHU6AheF+41Gh49wBEgghz77tiSiR65HZlh4Tk2rhuE2Wq6smYbpV +ztkd7oT9m8jtAmqM7c0fhzSobP8g8l4SJa8NoBD2bx9EpVuszBZvU/Rd rMXq3BD6bXGx3fUzMHMwb8PTbjiSz2StILEMO3mrab3LOnQzorYd7usNB A=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 18 Apr 2022 03:21:08 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Apr 2022 03:21:07 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 18 Apr 2022 03:21:06 -0700 Received: from [10.216.27.177] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 18 Apr 2022 03:21:00 -0700 Message-ID: Date: Mon, 18 Apr 2022 15:50:57 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH v12 5/7] pinctrl: qcom: Extract chip specific LPASS LPI code Content-Language: en-US To: Matthias Kaehlcke CC: , , , , , , , , , , , , , , , , , Linus Walleij , , "Venkata Prasad Potturu" References: <1647447426-23425-1-git-send-email-quic_srivasam@quicinc.com> <1647447426-23425-6-git-send-email-quic_srivasam@quicinc.com> From: Srinivasa Rao Mandadapu Organization: Qualcomm In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 4/16/2022 3:09 AM, Matthias Kaehlcke wrote: Thanks for your Time Matthias!!! > On Wed, Mar 16, 2022 at 09:47:04PM +0530, Srinivasa Rao Mandadapu wrote: >> Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver >> to allow reusing the common code in the addition of subsequent >> platforms. >> >> Signed-off-by: Srinivasa Rao Mandadapu >> Co-developed-by: Venkata Prasad Potturu >> Signed-off-by: Venkata Prasad Potturu >> ... >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c >> new file mode 100644 >> index 0000000..8c95d0f >> --- /dev/null >> +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c > ... > >> + >> +/* sm8250 variant specific data */ > nit: the comment seems a bit redundant since this is now the sm8250 > pinctrl driver. Okay. Will remove it. > >> +static const struct pinctrl_pin_desc sm8250_lpi_pins[] = { >> + PINCTRL_PIN(0, "gpio0"), >> + PINCTRL_PIN(1, "gpio1"), >> + PINCTRL_PIN(2, "gpio2"), >> + PINCTRL_PIN(3, "gpio3"), >> + PINCTRL_PIN(4, "gpio4"), >> + PINCTRL_PIN(5, "gpio5"), >> + PINCTRL_PIN(6, "gpio6"), >> + PINCTRL_PIN(7, "gpio7"), >> + PINCTRL_PIN(8, "gpio8"), >> + PINCTRL_PIN(9, "gpio9"), >> + PINCTRL_PIN(10, "gpio10"), >> + PINCTRL_PIN(11, "gpio11"), >> + PINCTRL_PIN(12, "gpio12"), >> + PINCTRL_PIN(13, "gpio13"), >> +}; >> >> ... > The nit is just a nit and otherwise this looks good to me, so: > > Reviewed-by: Matthias Kaehlcke From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F59FC433EF for ; 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18 Apr 2022 03:21:08 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Apr 2022 03:21:07 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 18 Apr 2022 03:21:06 -0700 Received: from [10.216.27.177] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 18 Apr 2022 03:21:00 -0700 Message-ID: Date: Mon, 18 Apr 2022 15:50:57 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH v12 5/7] pinctrl: qcom: Extract chip specific LPASS LPI code Content-Language: en-US To: Matthias Kaehlcke References: <1647447426-23425-1-git-send-email-quic_srivasam@quicinc.com> <1647447426-23425-6-git-send-email-quic_srivasam@quicinc.com> From: Srinivasa Rao Mandadapu Organization: Qualcomm In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, bgoswami@codeaurora.org, Venkata Prasad Potturu , linux-arm-msm@vger.kernel.org, swboyd@chromium.org, tiwai@suse.com, agross@kernel.org, robh+dt@kernel.org, lgirdwood@gmail.com, linux-gpio@vger.kernel.org, rohitkr@codeaurora.org, broonie@kernel.org, srinivas.kandagatla@linaro.org, quic_plai@quicinc.com, bjorn.andersson@linaro.org, judyhsiao@chromium.org, Linus Walleij , linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On 4/16/2022 3:09 AM, Matthias Kaehlcke wrote: Thanks for your Time Matthias!!! > On Wed, Mar 16, 2022 at 09:47:04PM +0530, Srinivasa Rao Mandadapu wrote: >> Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver >> to allow reusing the common code in the addition of subsequent >> platforms. >> >> Signed-off-by: Srinivasa Rao Mandadapu >> Co-developed-by: Venkata Prasad Potturu >> Signed-off-by: Venkata Prasad Potturu >> ... >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c >> new file mode 100644 >> index 0000000..8c95d0f >> --- /dev/null >> +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c > ... > >> + >> +/* sm8250 variant specific data */ > nit: the comment seems a bit redundant since this is now the sm8250 > pinctrl driver. Okay. Will remove it. > >> +static const struct pinctrl_pin_desc sm8250_lpi_pins[] = { >> + PINCTRL_PIN(0, "gpio0"), >> + PINCTRL_PIN(1, "gpio1"), >> + PINCTRL_PIN(2, "gpio2"), >> + PINCTRL_PIN(3, "gpio3"), >> + PINCTRL_PIN(4, "gpio4"), >> + PINCTRL_PIN(5, "gpio5"), >> + PINCTRL_PIN(6, "gpio6"), >> + PINCTRL_PIN(7, "gpio7"), >> + PINCTRL_PIN(8, "gpio8"), >> + PINCTRL_PIN(9, "gpio9"), >> + PINCTRL_PIN(10, "gpio10"), >> + PINCTRL_PIN(11, "gpio11"), >> + PINCTRL_PIN(12, "gpio12"), >> + PINCTRL_PIN(13, "gpio13"), >> +}; >> >> ... > The nit is just a nit and otherwise this looks good to me, so: > > Reviewed-by: Matthias Kaehlcke