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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v4 12/17] x86emul: support SSE4.1 insns
Date: Wed, 1 Mar 2017 16:58:05 +0000	[thread overview]
Message-ID: <c7c88646-0d6b-6a48-faa1-13903351fcf1@citrix.com> (raw)
In-Reply-To: <58B5818D020000780013E2F1@prv-mh.provo.novell.com>

On 28/02/17 12:56, Jan Beulich wrote:
> @@ -6951,6 +7040,97 @@ x86_emulate(
>          fic.insn_bytes = PFX_BYTES + 3;
>          break;
>  
> +    case X86EMUL_OPC_66(0x0f38, 0x20): /* pmovsxbw xmm/m64,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x21): /* pmovsxbd xmm/m32,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x22): /* pmovsxbq xmm/m16,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x23): /* pmovsxwd xmm/m64,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x24): /* pmovsxwq xmm/m32,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x25): /* pmovsxdq xmm/m64,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x30): /* pmovzxbw xmm/m64,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x31): /* pmovzxbd xmm/m32,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x32): /* pmovzxbq xmm/m16,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x33): /* pmovzxwd xmm/m64,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x34): /* pmovzxwq xmm/m32,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x35): /* pmovzxdq xmm/m64,xmm */
> +        op_bytes = 16 >> pmov_convert_delta[b & 7];
> +        /* fall through */
> +    case X86EMUL_OPC_66(0x0f38, 0x10): /* pblendvb XMM0,xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x14): /* blendvps XMM0,xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x15): /* blendvpd XMM0,xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x28): /* pmuldq xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x29): /* pcmpeqq xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x2b): /* packusdw xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x38): /* pminsb xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x39): /* pminsd xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x3a): /* pminub xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x3b): /* pminud xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x3c): /* pmaxsb xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x3d): /* pmaxsd xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x3e): /* pmaxub xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x3f): /* pmaxud xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x40): /* pmulld xmm/m128,xmm */
> +    case X86EMUL_OPC_66(0x0f38, 0x41): /* phminposuw xmm/m128,xmm */
> +        host_and_vcpu_must_have(sse4_1);
> +        goto simd_0f38_common;
> +
> +    case X86EMUL_OPC_66(0x0f38, 0x17):     /* ptest xmm/m128,xmm */
> +    case X86EMUL_OPC_VEX_66(0x0f38, 0x17): /* vptest {x,y}mm/mem,{x,y}mm */
> +        if ( vex.opcx == vex_none )
> +        {
> +            host_and_vcpu_must_have(sse4_1);
> +            get_fpu(X86EMUL_FPU_xmm, &fic);
> +        }
> +        else
> +        {
> +            generate_exception_if(vex.reg != 0xf, EXC_UD);
> +            host_and_vcpu_must_have(avx);
> +            get_fpu(X86EMUL_FPU_ymm, &fic);
> +        }
> +
> +        opc = init_prefixes(stub);
> +        if ( vex.opcx == vex_none )
> +            opc[0] = 0x38;
> +        opc[vex.opcx == vex_none] = b;
> +        opc[1 + (vex.opcx == vex_none)] = modrm;

This use of (vex.opcx == vex_none) for construction is very awkward to read.

How about:

if ( vex.opcx == vex_none )
{
    opc[0] = 0x38;
    opc++; /* Adjust for extra prefix. */
}

...

if ( vex.opcx == vex_none )
    opc--; /* Undo adjustment for extra prefix. */

which allows the rest of the opc[] setup to read like all the other
similar code.


In fact, thinking more about this, using a pointer-arithmatic-based
method of filling the stub would allow for the removal of
"fic.insn_bytes = PFX_BYTES + $X", and any chance of getting the count
wrong.

~Andrew

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  reply	other threads:[~2017-03-01 16:58 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-28 12:42 [PATCH v4 00/17] x86emul: MMX/SSEn support Jan Beulich
2017-02-28 12:49 ` [PATCH v4 01/17] x86emul: support most memory accessing MMX/SSE{, 2, 3} insns Jan Beulich
2017-03-01 13:17   ` Andrew Cooper
2017-03-01 13:50     ` Jan Beulich
2017-03-01 18:08       ` Andrew Cooper
2017-02-28 12:50 ` [PATCH v4 02/17] x86emul: support MMX/SSE{,2,3} moves Jan Beulich
2017-03-01 13:59   ` [PATCH v4 02/17] x86emul: support MMX/SSE{, 2, 3} moves Andrew Cooper
2017-03-01 14:19     ` Jan Beulich
2017-03-01 19:56       ` Andrew Cooper
2017-03-02  8:07         ` Jan Beulich
2017-02-28 12:51 ` [PATCH v4 03/17] x86emul: support MMX/SSE/SSE2 converts Jan Beulich
2017-03-01 14:09   ` Andrew Cooper
2017-02-28 12:51 ` [PATCH v4 04/17] x86emul: support {,V}{,U}COMIS{S,D} Jan Beulich
2017-03-01 14:16   ` [PATCH v4 04/17] x86emul: support {, V}{, U}COMIS{S, D} Andrew Cooper
2017-03-01 14:26     ` Jan Beulich
2017-03-01 14:31       ` Andrew Cooper
2017-02-28 12:52 ` [PATCH v4 05/17] x86emul: support MMX/SSE{, 2, 4a} insns with only register operands Jan Beulich
2017-03-01 14:36   ` Andrew Cooper
2017-03-01 14:43     ` Jan Beulich
2017-03-01 20:01       ` Andrew Cooper
2017-02-28 12:52 ` [PATCH v4 06/17] x86emul: support {,V}{LD,ST}MXCSR Jan Beulich
2017-03-01 14:57   ` Andrew Cooper
2017-02-28 12:53 ` [PATCH v4 07/17] x86emul: support {,V}MOVNTDQA Jan Beulich
2017-03-01 14:58   ` Andrew Cooper
2017-02-28 12:53 ` [PATCH v4 08/17] x86emul: test coverage for SSE/SSE2 insns Jan Beulich
2017-02-28 12:54 ` [PATCH v4 09/17] x86emul: honor MMXEXT feature flag Jan Beulich
2017-02-28 12:54 ` [PATCH v4 10/17] x86emul: add tables for 0f38 and 0f3a extension space Jan Beulich
2017-03-01 15:49   ` Andrew Cooper
2017-03-01 16:11     ` Jan Beulich
2017-03-01 20:35       ` Andrew Cooper
2017-03-02  8:15         ` Jan Beulich
2017-02-28 12:55 ` [PATCH v4 11/17] x86emul: support SSSE3 insns Jan Beulich
2017-03-01 16:06   ` Andrew Cooper
2017-02-28 12:56 ` [PATCH v4 12/17] x86emul: support SSE4.1 insns Jan Beulich
2017-03-01 16:58   ` Andrew Cooper [this message]
2017-03-02  8:26     ` Jan Beulich
2017-02-28 12:56 ` [PATCH v4 13/17] x86emul: support SSE4.2 insns Jan Beulich
2017-03-01 17:21   ` Andrew Cooper
2017-02-28 12:57 ` [PATCH v4 14/17] x86emul: test coverage for SSE3/SSSE3/SSE4* insns Jan Beulich
2017-03-01 17:22   ` Andrew Cooper
2017-02-28 12:58 ` [PATCH v4 15/17] x86emul: support PCLMULQDQ Jan Beulich
2017-03-01 17:44   ` Andrew Cooper
2017-03-02  8:30     ` Jan Beulich
2017-02-28 12:58 ` [PATCH v4 16/17] x86emul: support AESNI insns Jan Beulich
2017-02-28 12:59 ` [PATCH v4 17/17] x86emul: support SHA insns Jan Beulich
2017-03-01 17:51   ` Andrew Cooper

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