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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Havard Skinnemoen <hskinnemoen@google.com>,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: kfting@nuvoton.com, Avi.Fishman@nuvoton.com,
	Joel Stanley <joel@jms.id.au>
Subject: Re: [PATCH v6 03/13] hw/timer: Add NPCM7xx Timer device model
Date: Fri, 17 Jul 2020 10:10:06 +0200	[thread overview]
Message-ID: <c8786cce-6555-d4c4-ada9-7dec05b0853c@amsat.org> (raw)
In-Reply-To: <20200717060258.1602319-4-hskinnemoen@google.com>

On 7/17/20 8:02 AM, Havard Skinnemoen wrote:
> The NPCM730 and NPCM750 SoCs have three timer modules each holding five
> timers and some shared registers (e.g. interrupt status).
> 
> Each timer runs at 25 MHz divided by a prescaler, and counts down from a
> configurable initial value to zero. When zero is reached, the interrupt
> flag for the timer is set, and the timer is disabled (one-shot mode) or
> reloaded from its initial value (periodic mode).
> 
> This implementation is sufficient to boot a Linux kernel configured for
> NPCM750. Note that the kernel does not seem to actually turn on the
> interrupts.
> 
> Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
> ---
>  include/hw/timer/npcm7xx_timer.h |  96 ++++++
>  hw/timer/npcm7xx_timer.c         | 489 +++++++++++++++++++++++++++++++
>  hw/timer/Makefile.objs           |   1 +
>  hw/timer/trace-events            |   5 +
>  4 files changed, 591 insertions(+)
>  create mode 100644 include/hw/timer/npcm7xx_timer.h
>  create mode 100644 hw/timer/npcm7xx_timer.c
...

> +/*
> + * Raise the interrupt line if there's a pending interrupt and interrupts are
> + * enabled for this timer. If not, lower it.
> + */
> +static void npcm7xx_timer_check_interrupt(NPCM7xxTimer *t)
> +{
> +    NPCM7xxTimerCtrlState *tc = t->ctrl;
> +    int index = npcm7xx_timer_index(tc, t);
> +
> +    if ((t->tcsr & NPCM7XX_TCSR_IE) && (tc->tisr & BIT(index))) {
> +        qemu_irq_raise(t->irq);
> +        trace_npcm7xx_timer_irq(DEVICE(tc)->canonical_path, index, 1);
> +    } else {
> +        qemu_irq_lower(t->irq);
> +        trace_npcm7xx_timer_irq(DEVICE(tc)->canonical_path, index, 0);
> +    }

Maybe simpler:

  bool pending = (t->tcsr & NPCM7XX_TCSR_IE) && (tc->tisr & BIT(index));

  trace_npcm7xx_timer_irq(DEVICE(tc)->canonical_path, index, pending);
  qemu_set_irq(t->irq, pending);

Anyway,
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  parent reply	other threads:[~2020-07-17  8:10 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-17  6:02 [PATCH v6 00/13] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 01/13] hw/misc: Add NPCM7xx System Global Control Registers device model Havard Skinnemoen
2020-07-17  7:59   ` Philippe Mathieu-Daudé
2020-07-17  6:02 ` [PATCH v6 02/13] hw/misc: Add NPCM7xx Clock Controller " Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 03/13] hw/timer: Add NPCM7xx Timer " Havard Skinnemoen
2020-07-17  8:05   ` Philippe Mathieu-Daudé
2020-07-17  8:10   ` Philippe Mathieu-Daudé [this message]
2020-07-17  6:02 ` [PATCH v6 04/13] hw/arm: Add NPCM730 and NPCM750 SoC models Havard Skinnemoen
2020-07-17 12:20   ` Cédric Le Goater
2020-07-17 16:59     ` Havard Skinnemoen
2020-07-18  6:38       ` Philippe Mathieu-Daudé
2020-07-17  6:02 ` [PATCH v6 05/13] hw/arm: Add two NPCM7xx-based machines Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 06/13] roms: Add virtual Boot ROM for NPCM7xx SoCs Havard Skinnemoen
2020-07-17 12:26   ` Cédric Le Goater
2020-07-17  6:02 ` [PATCH v6 07/13] hw/arm: Load -bios image as a boot ROM for npcm7xx Havard Skinnemoen
2020-07-17 12:14   ` Cédric Le Goater
2020-07-17  6:02 ` [PATCH v6 08/13] hw/nvram: NPCM7xx OTP device model Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 09/13] hw/mem: Stubbed out NPCM7xx Memory Controller model Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 10/13] hw/ssi: NPCM7xx Flash Interface Unit device model Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 11/13] hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 12/13] docs/system: Add Nuvoton machine documentation Havard Skinnemoen
2020-07-17  6:02 ` [PATCH v6 13/13] tests/acceptance: console boot tests for quanta-gsj Havard Skinnemoen
2020-07-17 12:33   ` Cédric Le Goater
2020-07-20  8:22     ` Joel Stanley
2020-07-20  9:49       ` Philippe Mathieu-Daudé
2020-07-17 20:32 ` [PATCH v6 00/13] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines Cédric Le Goater
2020-07-18  2:17   ` Havard Skinnemoen
2020-08-03 19:08 ` Philippe Mathieu-Daudé
2020-08-03 20:37   ` Havard Skinnemoen

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