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[173.173.107.246]) by smtp.gmail.com with ESMTPSA id p203-20020acaf1d4000000b00325cda1ffacsm3507693oih.43.2022.05.03.10.35.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 May 2022 10:35:29 -0700 (PDT) Message-ID: Date: Tue, 3 May 2022 12:35:27 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH] PCI: qcom: Remove ddrss_sf_tbu clock from sc8180x Content-Language: en-US To: Bjorn Andersson , Stanimir Varbanov , Lorenzo Pieralisi , Rob Herring , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220331013415.592748-1-bjorn.andersson@linaro.org> From: Steev Klimaszewski In-Reply-To: <20220331013415.592748-1-bjorn.andersson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 3/30/22 8:34 PM, Bjorn Andersson wrote: > The Qualcomm SC8180X platform was piggy backing on the SM8250 > qcom_pcie_cfg, but the platform doesn't have the ddrss_sf_tbu clock, so > it now fails to probe due to the missing clock. > > Give SC8180X its own qcom_pcie_cfg, without the ddrss_sf_tbu flag set. > > Fixes: 0614f98bbb9f ("PCI: qcom: Add ddrss_sf_tbu flag") > Signed-off-by: Bjorn Andersson > --- > drivers/pci/controller/dwc/pcie-qcom.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 6ab90891801d..816028c0f6ed 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1550,6 +1550,11 @@ static const struct qcom_pcie_cfg sc7280_cfg = { > .pipe_clk_need_muxing = true, > }; > > +static const struct qcom_pcie_cfg sc8180x_cfg = { > + .ops = &ops_1_9_0, > + .has_tbu_clk = true, > +}; > + > static const struct dw_pcie_ops dw_pcie_ops = { > .link_up = qcom_pcie_link_up, > .start_link = qcom_pcie_start_link, > @@ -1656,7 +1661,7 @@ static const struct of_device_id qcom_pcie_match[] = { > { .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg }, > { .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg }, > { .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg }, > - { .compatible = "qcom,pcie-sc8180x", .data = &sm8250_cfg }, > + { .compatible = "qcom,pcie-sc8180x", .data = &sc8180x_cfg }, > { .compatible = "qcom,pcie-sm8450-pcie0", .data = &sm8450_pcie0_cfg }, > { .compatible = "qcom,pcie-sm8450-pcie1", .data = &sm8450_pcie1_cfg }, > { .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg }, Hi Bjorn, Tested on the Lenovo Flex 5G and fixes the issue I saw. Tested-by: Steev Klimaszewski