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From: "Natarajan, Janakarajan" <Janakarajan.Natarajan@amd.com>
To: "linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"devel@acpica.org" <devel@acpica.org>
Cc: "Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Len Brown <lenb@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Robert Moore <robert.moore@intel.com>,
	Erik Schmauss <erik.schmauss@intel.com>,
	"Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
	"Natarajan, Janakarajan" <Janakarajan.Natarajan@amd.com>
Subject: [PATCH v2 5/7] acpi/cppc: Add macros to define a R/W sysfs entry for CPPC registers
Date: Thu, 4 Apr 2019 21:25:53 +0000	[thread overview]
Message-ID: <ca37ee20457cbd96b4f028ec7155135c61b06e61.1554410643.git.Janakarajan.Natarajan@amd.com> (raw)
In-Reply-To: <cover.1554410643.git.Janakarajan.Natarajan@amd.com>

From: Yazen Ghannam <Yazen.Ghannam@amd.com>

Some CPPC registers can be used to configure the platform. To enable this,
create macros to define the show, store routines and create sysfs entries
with R/W permission.

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
[ carved into a patch, cleaned up, productized ]
Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
---
 drivers/acpi/cppc_acpi.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 1cce231b8501..1e862415faf0 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -142,6 +142,10 @@ struct cppc_attr {
 static struct cppc_attr _name =			\
 __ATTR(_name, 0444, show_##_name, NULL)
 
+#define define_one_cppc_rw(_name)		\
+static struct cppc_attr _name =			\
+__ATTR(_name, 0644, show_##_name, store_##_name)
+
 #define to_cpc_desc(a) container_of(a, struct cpc_desc, kobj)
 
 #define show_cppc_data(access_fn, struct_name, member_name)		\
@@ -164,6 +168,33 @@ __ATTR(_name, 0444, show_##_name, NULL)
 	show_cppc_data(access_fn, struct_name, member_name)		\
 	define_one_cppc_ro(member_name)
 
+#define store_cppc_data(struct_name, member_name, reg_idx)		\
+	static ssize_t store_##member_name(struct kobject *kobj,	\
+					   struct attribute *attr,	\
+					   const char *c, ssize_t count)\
+	{								\
+		struct cpc_desc *cpc_ptr = to_cpc_desc(kobj);		\
+		struct struct_name st_name = {0};			\
+		u32 val;						\
+		int ret;						\
+									\
+		ret = kstrtou32(c, 0, &val);				\
+		if (ret)						\
+			return ret;					\
+									\
+		st_name.member_name = val;				\
+									\
+		ret = cppc_set_reg(cpc_ptr->cpu_id, &st_name, reg_idx);	\
+		if (ret)						\
+			return ret;					\
+									\
+		return count;						\
+	}								\
+
+#define store_cppc_data_rw(struct_name, member_name, reg_idx)		\
+	store_cppc_data(struct_name, member_name, reg_idx)		\
+	define_one_cppc_rw(member_name)
+
 show_cppc_data_ro(cppc_get_perf_caps, cppc_perf_caps, highest_perf);
 show_cppc_data_ro(cppc_get_perf_caps, cppc_perf_caps, lowest_perf);
 show_cppc_data_ro(cppc_get_perf_caps, cppc_perf_caps, nominal_perf);
-- 
2.17.1


  parent reply	other threads:[~2019-04-04 21:25 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04 21:25 [PATCH v2 0/7] CPPC optional registers AMD support Natarajan, Janakarajan
2019-04-04 21:25 ` [PATCH v2 1/7] acpi/cppc: Add macro for CPPC register BUFFER only check Natarajan, Janakarajan
2019-04-04 21:25 ` [PATCH v2 2/7] acpi/cppc: Ensure only supported CPPC sysfs entries are created Natarajan, Janakarajan
2019-04-04 21:25 ` [PATCH v2 3/7] acpi/cppc: Modify show_cppc_data macro Natarajan, Janakarajan
2019-04-04 21:25 ` [PATCH v2 4/7] acpi/cppc: Rework cppc_set_perf() to use cppc_regs index Natarajan, Janakarajan
2019-04-04 21:25 ` Natarajan, Janakarajan [this message]
2019-04-04 21:25 ` [PATCH v2 6/7] acpi/cppc: Add support for optional CPPC registers Natarajan, Janakarajan
2019-04-04 21:25 ` [PATCH v2 7/7] acpi/cppc: Add support for CPPC Enable register Natarajan, Janakarajan
2019-04-15 22:35 ` [PATCH v2 0/7] CPPC optional registers AMD support Janakarajan Natarajan
2019-04-16  9:34   ` Rafael J. Wysocki
2019-04-16  9:34     ` [Devel] " Rafael J. Wysocki
2019-04-17 17:28     ` Ghannam, Yazen
2019-04-17 17:28       ` Ghannam, Yazen
2019-04-17 22:10       ` Rafael J. Wysocki
2019-04-17 22:10         ` [Devel] " Rafael J. Wysocki
2019-04-18 16:40         ` Ghannam, Yazen

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