From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 688F8C6FA91 for ; Wed, 21 Sep 2022 02:49:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230204AbiIUCtC (ORCPT ); Tue, 20 Sep 2022 22:49:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229676AbiIUCs7 (ORCPT ); Tue, 20 Sep 2022 22:48:59 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B44734BD21; Tue, 20 Sep 2022 19:48:51 -0700 (PDT) X-UUID: bb899c095730417f8550dbb20c369c24-20220921 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; 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Wed, 21 Sep 2022 10:48:44 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 21 Sep 2022 10:48:44 +0800 Message-ID: Subject: Re: [PATCH v1 01/17] dt-bindings: clk: mediatek: Add MT8195 DPI clocks From: Bo-Chen Chen To: Guillaume Ranquet , Vinod Koul , Stephen Boyd , David Airlie , Rob Herring , Philipp Zabel , "Krzysztof Kozlowski" , Daniel Vetter , Chunfeng Yun , CK Hu , Jitao shi , Chun-Kuang Hu , Michael Turquette , Kishon Vijay Abraham I , Matthias Brugger CC: , , Pablo Sun , , , Mattijs Korpershoek , , , Date: Wed, 21 Sep 2022 10:48:44 +0800 In-Reply-To: <20220919-v1-1-4844816c9808@baylibre.com> References: <20220919-v1-0-4844816c9808@baylibre.com> <20220919-v1-1-4844816c9808@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2022-09-19 at 18:55 +0200, Guillaume Ranquet wrote: > From: Pablo Sun > > Expand dt-bindings slot for VDOSYS1 of MT8195. > This clock is required by the DPI1 hardware > and is a downstream of the HDMI pixel clock. > > Signed-off-by: Pablo Sun > Signed-off-by: Guillaume Ranquet > Reviewed-by: Mattijs Korpershoek > > diff --git a/include/dt-bindings/clock/mt8195-clk.h b/include/dt- > bindings/clock/mt8195-clk.h > index 95cf812a0b37..d70d017ad69c 100644 > --- a/include/dt-bindings/clock/mt8195-clk.h > +++ b/include/dt-bindings/clock/mt8195-clk.h > @@ -859,6 +859,8 @@ > #define CLK_VDO1_DPINTF 47 > #define CLK_VDO1_DISP_MONITOR_DPINTF 48 > #define CLK_VDO1_26M_SLOW 49 > -#define CLK_VDO1_NR_CLK 50 > +#define CLK_VDO1_DPI1_HDMI 50 > +#define CLK_VDO1_NR_CLK 51 > + > > #endif /* _DT_BINDINGS_CLK_MT8195_H */ Hello Guillaume, I am not sure the reason, but it seems patches in this series lack of something like this for whole series: --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 + 1 file changed, 1 insertion(+) BRs, Bo-Chen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1479C54EE9 for ; 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Wed, 21 Sep 2022 10:48:46 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Wed, 21 Sep 2022 10:48:44 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 21 Sep 2022 10:48:44 +0800 Message-ID: Subject: Re: [PATCH v1 01/17] dt-bindings: clk: mediatek: Add MT8195 DPI clocks From: Bo-Chen Chen To: Guillaume Ranquet , Vinod Koul , Stephen Boyd , David Airlie , Rob Herring , Philipp Zabel , "Krzysztof Kozlowski" , Daniel Vetter , Chunfeng Yun , CK Hu , Jitao shi , Chun-Kuang Hu , Michael Turquette , Kishon Vijay Abraham I , Matthias Brugger Date: Wed, 21 Sep 2022 10:48:44 +0800 In-Reply-To: <20220919-v1-1-4844816c9808@baylibre.com> References: <20220919-v1-0-4844816c9808@baylibre.com> <20220919-v1-1-4844816c9808@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Mattijs Korpershoek , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Pablo Sun , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, 2022-09-19 at 18:55 +0200, Guillaume Ranquet wrote: > From: Pablo Sun > > Expand dt-bindings slot for VDOSYS1 of MT8195. > This clock is required by the DPI1 hardware > and is a downstream of the HDMI pixel clock. > > Signed-off-by: Pablo Sun > Signed-off-by: Guillaume Ranquet > Reviewed-by: Mattijs Korpershoek > > diff --git a/include/dt-bindings/clock/mt8195-clk.h b/include/dt- > bindings/clock/mt8195-clk.h > index 95cf812a0b37..d70d017ad69c 100644 > --- a/include/dt-bindings/clock/mt8195-clk.h > +++ b/include/dt-bindings/clock/mt8195-clk.h > @@ -859,6 +859,8 @@ > #define CLK_VDO1_DPINTF 47 > #define CLK_VDO1_DISP_MONITOR_DPINTF 48 > #define CLK_VDO1_26M_SLOW 49 > -#define CLK_VDO1_NR_CLK 50 > +#define CLK_VDO1_DPI1_HDMI 50 > +#define CLK_VDO1_NR_CLK 51 > + > > #endif /* _DT_BINDINGS_CLK_MT8195_H */ Hello Guillaume, I am not sure the reason, but it seems patches in this series lack of something like this for whole series: --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 + 1 file changed, 1 insertion(+) BRs, Bo-Chen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23C98C6FA82 for ; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Mon, 2022-09-19 at 18:55 +0200, Guillaume Ranquet wrote: > From: Pablo Sun > > Expand dt-bindings slot for VDOSYS1 of MT8195. > This clock is required by the DPI1 hardware > and is a downstream of the HDMI pixel clock. > > Signed-off-by: Pablo Sun > Signed-off-by: Guillaume Ranquet > Reviewed-by: Mattijs Korpershoek > > diff --git a/include/dt-bindings/clock/mt8195-clk.h b/include/dt- > bindings/clock/mt8195-clk.h > index 95cf812a0b37..d70d017ad69c 100644 > --- a/include/dt-bindings/clock/mt8195-clk.h > +++ b/include/dt-bindings/clock/mt8195-clk.h > @@ -859,6 +859,8 @@ > #define CLK_VDO1_DPINTF 47 > #define CLK_VDO1_DISP_MONITOR_DPINTF 48 > #define CLK_VDO1_26M_SLOW 49 > -#define CLK_VDO1_NR_CLK 50 > +#define CLK_VDO1_DPI1_HDMI 50 > +#define CLK_VDO1_NR_CLK 51 > + > > #endif /* _DT_BINDINGS_CLK_MT8195_H */ Hello Guillaume, I am not sure the reason, but it seems patches in this series lack of something like this for whole series: --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 + 1 file changed, 1 insertion(+) BRs, Bo-Chen -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6C8FC54EE9 for ; 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Tue, 20 Sep 2022 19:49:17 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Wed, 21 Sep 2022 10:48:44 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 21 Sep 2022 10:48:44 +0800 Message-ID: Subject: Re: [PATCH v1 01/17] dt-bindings: clk: mediatek: Add MT8195 DPI clocks From: Bo-Chen Chen To: Guillaume Ranquet , Vinod Koul , Stephen Boyd , David Airlie , Rob Herring , Philipp Zabel , "Krzysztof Kozlowski" , Daniel Vetter , Chunfeng Yun , CK Hu , Jitao shi , Chun-Kuang Hu , Michael Turquette , Kishon Vijay Abraham I , Matthias Brugger CC: , , Pablo Sun , , , Mattijs Korpershoek , , , Date: Wed, 21 Sep 2022 10:48:44 +0800 In-Reply-To: <20220919-v1-1-4844816c9808@baylibre.com> References: <20220919-v1-0-4844816c9808@baylibre.com> <20220919-v1-1-4844816c9808@baylibre.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220920_194925_570259_DD555E77 X-CRM114-Status: GOOD ( 17.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2022-09-19 at 18:55 +0200, Guillaume Ranquet wrote: > From: Pablo Sun > > Expand dt-bindings slot for VDOSYS1 of MT8195. > This clock is required by the DPI1 hardware > and is a downstream of the HDMI pixel clock. > > Signed-off-by: Pablo Sun > Signed-off-by: Guillaume Ranquet > Reviewed-by: Mattijs Korpershoek > > diff --git a/include/dt-bindings/clock/mt8195-clk.h b/include/dt- > bindings/clock/mt8195-clk.h > index 95cf812a0b37..d70d017ad69c 100644 > --- a/include/dt-bindings/clock/mt8195-clk.h > +++ b/include/dt-bindings/clock/mt8195-clk.h > @@ -859,6 +859,8 @@ > #define CLK_VDO1_DPINTF 47 > #define CLK_VDO1_DISP_MONITOR_DPINTF 48 > #define CLK_VDO1_26M_SLOW 49 > -#define CLK_VDO1_NR_CLK 50 > +#define CLK_VDO1_DPI1_HDMI 50 > +#define CLK_VDO1_NR_CLK 51 > + > > #endif /* _DT_BINDINGS_CLK_MT8195_H */ Hello Guillaume, I am not sure the reason, but it seems patches in this series lack of something like this for whole series: --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 + 1 file changed, 1 insertion(+) BRs, Bo-Chen _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel