From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F45EC433B4 for ; Fri, 21 May 2021 13:21:11 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC8C2613EC for ; Fri, 21 May 2021 13:21:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC8C2613EC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2708D82E21; Fri, 21 May 2021 15:21:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id F3EBE82E40; Fri, 21 May 2021 15:21:04 +0200 (CEST) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.70.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1226C81658 for ; Fri, 21 May 2021 15:21:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=kever.yang@rock-chips.com Received: from localhost (unknown [192.168.167.223]) by regular1.263xmail.com (Postfix) with ESMTP id A63331A32 for ; Fri, 21 May 2021 21:20:53 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-SKE-CHECKED: 1 X-ABS-CHECKED: 1 Received: from [172.16.12.120] (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P4335T139624823387904S1621603250934338_; Fri, 21 May 2021 21:20:51 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: kever.yang@rock-chips.com X-SENDER: yk@rock-chips.com X-LOGIN-NAME: kever.yang@rock-chips.com X-FST-TO: bmeng.cn@gmail.com X-RCPT-COUNT: 4 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 Subject: Re: [PATCH 3/3] pci: pcie_dw_rockchip: Use udelay instead of msleep To: Anand Moon , u-boot@lists.denx.de Cc: Neil Armstrong , Bin Meng References: <20210426132632.10221-1-linux.amoon@gmail.com> <20210426132632.10221-3-linux.amoon@gmail.com> From: Kever Yang Message-ID: Date: Fri, 21 May 2021 21:20:51 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210426132632.10221-3-linux.amoon@gmail.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Hi Anand, It's OK to update the API, but please keep the delay duration. Thanks, - Kever On 2021/4/26 下午9:26, Anand Moon wrote: > Use udelay instead of msleep fix the below warning. > > drivers/pci/pcie_dw_rockchip.c:254:3: warning: implicit > declaration of function 'msleep' [-Wimplicit-function-declaration] > > Cc: Neil Armstrong > Cc: Kever Yang > Signed-off-by: Anand Moon > --- > drivers/pci/pcie_dw_rockchip.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c > index e7f42604ab..6c87ee1ea0 100644 > --- a/drivers/pci/pcie_dw_rockchip.c > +++ b/drivers/pci/pcie_dw_rockchip.c > @@ -249,7 +249,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed) > * some wired devices need much more, such as 600ms. > * Add a enough delay to cover all cases. > */ > - msleep(PERST_WAIT_MS); > + udelay(PERST_WAIT_MS); > dm_gpio_set_value(&priv->rst_gpio, 1); > } > > @@ -271,12 +271,12 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed) > dev_info(priv->dw.dev, "PCIe Linking... LTSSM is 0x%x\n", > rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS)); > rk_pcie_debug_dump(priv); > - msleep(1000); > + udelay(1000); > } > > dev_err(priv->dw.dev, "PCIe-%d Link Fail\n", dev_seq(priv->dw.dev)); > /* Link maybe in Gen switch recovery but we need to wait more 1s */ > - msleep(1000); > + udelay(1000); > return -EIO; > } > > @@ -296,7 +296,7 @@ static int rockchip_pcie_init_port(struct udevice *dev) > } > } > > - msleep(1000); > + udelay(1000); > > ret = generic_phy_init(&priv->phy); > if (ret) {