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([2605:ef80:80e3:6069:e8b1:115d:14a3:4a1d]) by smtp.gmail.com with ESMTPSA id s22-20020a056870249600b0012752d3212fsm2919263oaq.53.2022.10.03.06.54.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Oct 2022 06:54:15 -0700 (PDT) Message-ID: Date: Mon, 3 Oct 2022 06:54:11 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v6 13/18] accel/tcg: Do not align tb->page_addr[0] Content-Language: en-US To: =?UTF-8?Q?Alex_Benn=c3=a9e?= Cc: peter.maydell@linux.org, alex.bennee@linux.org, qemu-devel@nongnu.org References: <20220930212622.108363-1-richard.henderson@linaro.org> <20220930212622.108363-14-richard.henderson@linaro.org> <87fsg5nkap.fsf@linaro.org> From: Richard Henderson In-Reply-To: <87fsg5nkap.fsf@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::22a; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22a.google.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.467, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/3/22 05:47, Alex Bennée wrote: > > Richard Henderson writes: > >> Let tb->page_addr[0] contain the offset within the page of the >> start of the translation block. We need to recover this value >> anyway at various points, and it is easier to discard the page >> offset when it's not needed, which happens naturally via the >> existing find_page shift. >> >> Signed-off-by: Richard Henderson >> --- >> accel/tcg/cpu-exec.c | 16 ++++++++-------- >> accel/tcg/cputlb.c | 3 ++- >> accel/tcg/translate-all.c | 9 +++++---- >> 3 files changed, 15 insertions(+), 13 deletions(-) >> >> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c >> index 5f43b9769a..dd58a144a8 100644 >> --- a/accel/tcg/cpu-exec.c >> +++ b/accel/tcg/cpu-exec.c >> @@ -174,7 +174,7 @@ struct tb_desc { >> target_ulong pc; >> target_ulong cs_base; >> CPUArchState *env; >> - tb_page_addr_t phys_page1; >> + tb_page_addr_t page_addr0; > > We don't actually document that this is an offset here (or indeed in > TranslationBlock) and the definition of tb_page_addr_t: > > /* Page tracking code uses ram addresses in system mode, and virtual > addresses in userspace mode. Define tb_page_addr_t to be an appropriate > type. */ > #if defined(CONFIG_USER_ONLY) > typedef abi_ulong tb_page_addr_t; > #define TB_PAGE_ADDR_FMT TARGET_ABI_FMT_lx > #else > typedef ram_addr_t tb_page_addr_t; > #define TB_PAGE_ADDR_FMT RAM_ADDR_FMT > #endif > > implies these are full size pointers into the guests address space. And that's what I've got. What we we were storing in phys_page1 before was a full size pointer that was page aligned. I'm now dropping the page alignment and having a full size pointer to the exact first byte of the translated code. Is that clearer? How would you improve the wording? r~ > Either we need a new type (tb_page_offset_t) or to properly comment the > structures with what they mean. > > Otherwise: > > Reviewed-by: Alex Bennée >