From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,INCLUDES_PULL_REQUEST, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD09AC07E96 for ; Thu, 15 Jul 2021 07:11:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A1A156128D for ; Thu, 15 Jul 2021 07:11:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240260AbhGOHOM (ORCPT ); Thu, 15 Jul 2021 03:14:12 -0400 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:36295 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240246AbhGOHOL (ORCPT ); Thu, 15 Jul 2021 03:14:11 -0400 Received: (Authenticated sender: alex@ghiti.fr) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 2372D1C000A; Thu, 15 Jul 2021 07:11:15 +0000 (UTC) Subject: Re: [GIT PULL] RISC-V Patches for the 5.14 Merge Window, Part 1 To: Palmer Dabbelt Cc: Linus Torvalds , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Jisheng Zhang , Geert Uytterhoeven , Arnd Bergmann References: From: Alex Ghiti Message-ID: Date: Thu, 15 Jul 2021 09:11:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Palmer, Le 11/07/2021 à 20:45, Palmer Dabbelt a écrit : > On Fri, 09 Jul 2021 12:58:10 PDT (-0700), alex@ghiti.fr wrote: >> >> >> Le 9/07/2021 à 16:53, Palmer Dabbelt a écrit : >>> The following changes since commit >>> 8a4102a0cf07cc76a18f373f6b49485258cc6af4: >>> >>>    riscv: mm: Fix W+X mappings at boot (2021-06-01 21:15:09 -0700) >>> >>> are available in the Git repository at: >>> >>>    git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git >>> tags/riscv-for-linus-5.14-mw0 >>> >>> for you to fetch changes up to 1958e5aef5098e28b7d6e6a2972649901ebecace: >>> >>>    riscv: xip: Fix duplicate included asm/pgtable.h (2021-07-06 >>> 16:17:40 -0700) >>> >>> ---------------------------------------------------------------- >>> RISC-V Patches for the 5.14 Merge Window, Part 1 >>> >>> In addition to We have a handful of new features for 5.14: >>> >>> * Support for transparent huge pages. >>> * Support for generic PCI resources mapping. >>> * Support for the mem= kernel parameter. >>> * Support for KFENCE. >>> * A handful of fixes to avoid W+X mappings in the kernel. >>> * Support for VMAP_STACK based overflow detection. >>> * An optimized copy_{to,from}_user. >>> ---------------------------------------------------------------- >>> There are some Kconfig merge conflicts.  They should be pretty >>> straight-forward, but we do have a symbol out of order -- I thought I >>> had a >>> script to check for that, but I guess it doesn't work.  I just sent >>> out a patch >>> to fix it up. >>> >>> diff --cc arch/riscv/Kconfig >>> index 3590eb76000e,469a70bd8da6..d36f3c5029fd >>> --- a/arch/riscv/Kconfig >>> +++ b/arch/riscv/Kconfig >>> @@@ -60,12 -61,11 +61,12 @@@ config RISC >>>          select GENERIC_TIME_VSYSCALL if MMU && 64BIT >>>          select HANDLE_DOMAIN_IRQ >>>          select HAVE_ARCH_AUDITSYSCALL >>> -       select HAVE_ARCH_JUMP_LABEL >>> -       select HAVE_ARCH_JUMP_LABEL_RELATIVE >>> +       select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL >>> +       select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL >>>          select HAVE_ARCH_KASAN if MMU && 64BIT >>>          select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT >>>   +      select HAVE_ARCH_KFENCE if MMU && 64BIT >>> -       select HAVE_ARCH_KGDB >>> +       select HAVE_ARCH_KGDB if !XIP_KERNEL >>>          select HAVE_ARCH_KGDB_QXFER_PKT >>>          select HAVE_ARCH_MMAP_RND_BITS if MMU >>>          select HAVE_ARCH_SECCOMP_FILTER >>> @@@ -81,11 -80,9 +82,14 @@@ >>>          select HAVE_GCC_PLUGINS >>>          select HAVE_GENERIC_VDSO if MMU && 64BIT >>>          select HAVE_IRQ_TIME_ACCOUNTING >>>   +      select HAVE_KPROBES >>>   +      select HAVE_KPROBES_ON_FTRACE >>>   +      select HAVE_KRETPROBES >>> +       select HAVE_KPROBES if !XIP_KERNEL >>> +       select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL >>> +       select HAVE_KRETPROBES if !XIP_KERNEL >>>   +      select HAVE_MOVE_PMD >>>   +      select HAVE_MOVE_PUD >>>          select HAVE_PCI >>>          select HAVE_PERF_EVENTS >>>          select HAVE_PERF_REGS >>> @@@ -108,7 -104,7 +112,8 @@@ >>>          select SYSCTL_EXCEPTION_TRACE >>>          select THREAD_INFO_IN_TASK >>>          select UACCESS_MEMCPY if !MMU >>>   +      select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU >>> +       select ZONE_DMA32 if 64BIT >>> >>>    config ARCH_MMAP_RND_BITS_MIN >>>          default 18 if 64BIT >>> ---------------------------------------------------------------- >>> Akira Tsukamoto (1): >>>        riscv: __asm_copy_to-from_user: Optimize unaligned memory >>> access and pipeline stall >>> >>> Alexandre Ghiti (6): >>>        riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED >>>        riscv: Simplify xip and !xip kernel address conversion macros >> >> @Palmer: As said in the thread of this patchset multiple times, those 2 >> patches should not be merged as it assumes that the base DRAM address is >> always 0x8000_0000 for all rv64 platforms: I don't think it is true, >> is it? > > Sorry, I remember saying something about that but must have missed the > resposeses.  Do you have a pointer to the discussion?  If this break > stuff I'm happy to revert it, which can be done post-rc1.  I just need > to see what's actually broken first, because IIUC this was de-facto how > things worked already. > Really sorry about my response delay. The thing is that removing CONFIG_PHYS_RAM_BASE_FIXED defines CONFIG_PHYS_RAM_BASE to 0x8000_0000 for all rv64 chips, but I believe this is implementation specific: for now, this base address was passed into the device tree, and here it makes this value static. This issue with my patch was originally pointed by Jisheng, Geert and Arnd. If this is not a problem and you have a pointer to a document that specifies this, I would be very happy to have the link :) Thanks and again sorry about my response delay, Alex >> >>>        riscv: Introduce set_kernel_memory helper >>>        riscv: Map the kernel with correct permissions the first time >>>        riscv: Introduce structure that group all variables regarding >>> kernel mapping >>>        riscv: Fix PTDUMP output now BPF region moved back to module >>> region >>> >>> Bixuan Cui (1): >>>        riscv: fix build error when CONFIG_SMP is disabled >>> >>> Christoph Hellwig (1): >>>        riscv: pass the mm_struct to __sbi_tlb_flush_range >>> >>> Guo Ren (3): >>>        riscv: Use global mappings for kernel pages >>>        riscv: Cleanup unused functions >>>        riscv: add ASID-based tlbflushing methods >>> >>> Jeff Xie (1): >>>        riscv: ptrace: add argn syntax >>> >>> Jiapeng Chong (1): >>>        riscv: xip: Fix duplicate included asm/pgtable.h >>> >>> Jisheng Zhang (7): >>>        riscv: mremap speedup - enable HAVE_MOVE_PUD and HAVE_MOVE_PMD >>>        riscv: mm: Remove setup_zero_page() >>>        riscv: Optimize switch_mm by passing "cpu" to >>> flush_icache_deferred() >>>        riscv: Turn has_fpu into a static key if FPU=y >>>        riscv: kprobes: Remove redundant kprobe_step_ctx >>>        riscv: Add __init section marker to some functions again >>>        riscv: mm: init: Consolidate vars, functions >>> >>> Kefeng Wang (5): >>>        riscv: Move setup_bootmem into paging_init >>>        riscv: mm: Drop redundant _sdata and _edata declaration >>>        riscv: mm: Use better bitmap_zalloc() >>>        riscv: Only initialize swiotlb when necessary >>>        riscv: Add mem kernel parameter support >>> >>> Liu Shixin (1): >>>        riscv: Enable KFENCE for riscv64 >>> >>> Nanyong Sun (5): >>>        riscv: mm: add _PAGE_LEAF macro >>>        riscv: mm: make pmd_bad() check leaf condition >>>        riscv: mm: add param stride for __sbi_tlb_flush_range >>>        riscv: mm: add THP support on 64-bit >>>        riscv: mm: fix build errors caused by mk_pmd() >>> >>> Palmer Dabbelt (2): >>>        RISC-V: Use asm-generic for {in,out}{bwlq} >>>        Merge branch 'riscv-wx-mappings' into for-next >>> >>> Randy Dunlap (1): >>>        riscv: TRANSPARENT_HUGEPAGE: depends on MMU >>> >>> Stanislaw Kardach (1): >>>        riscv: enable generic PCI resource mapping >>> >>> Tong Tiangen (1): >>>        riscv: add VMAP_STACK overflow detection >>> >>> Vitaly Wool (1): >>>        riscv: fix typo in init.c >>> >>>   arch/riscv/Kconfig                      |  12 +- >>>   arch/riscv/include/asm/asm-prototypes.h |   3 + >>>   arch/riscv/include/asm/io.h             |  13 -- >>>   arch/riscv/include/asm/kfence.h         |  63 +++++++ >>>   arch/riscv/include/asm/kprobes.h        |   7 - >>>   arch/riscv/include/asm/mmu_context.h    |   2 + >>>   arch/riscv/include/asm/page.h           |  81 +++++---- >>>   arch/riscv/include/asm/pci.h            |   2 + >>>   arch/riscv/include/asm/pgtable-64.h     |   5 +- >>>   arch/riscv/include/asm/pgtable-bits.h   |   5 + >>>   arch/riscv/include/asm/pgtable.h        | 171 ++++++++++++++++++- >>>   arch/riscv/include/asm/ptrace.h         |  31 ++++ >>>   arch/riscv/include/asm/sections.h       |  17 ++ >>>   arch/riscv/include/asm/set_memory.h     |  24 ++- >>>   arch/riscv/include/asm/switch_to.h      |  11 +- >>>   arch/riscv/include/asm/thread_info.h    |  15 ++ >>>   arch/riscv/include/asm/tlbflush.h       |   5 + >>>   arch/riscv/kernel/asm-offsets.c         |   2 + >>>   arch/riscv/kernel/cpufeature.c          |   6 +- >>>   arch/riscv/kernel/entry.S               | 108 ++++++++++++ >>>   arch/riscv/kernel/head.S                |   4 +- >>>   arch/riscv/kernel/kexec_relocate.S      |   4 +- >>>   arch/riscv/kernel/machine_kexec.c       |   2 +- >>>   arch/riscv/kernel/probes/kprobes.c      |  40 +---- >>>   arch/riscv/kernel/process.c             |   2 +- >>>   arch/riscv/kernel/setup.c               |  18 +- >>>   arch/riscv/kernel/signal.c              |   4 +- >>>   arch/riscv/kernel/traps.c               |  35 ++++ >>>   arch/riscv/kernel/vmlinux-xip.lds.S     |   1 - >>>   arch/riscv/kernel/vmlinux.lds.S         |   2 +- >>>   arch/riscv/lib/uaccess.S                | 181 ++++++++++++++++---- >>>   arch/riscv/mm/context.c                 |  14 +- >>>   arch/riscv/mm/fault.c                   |  11 +- >>>   arch/riscv/mm/init.c                    | 283 >>> +++++++++++++++----------------- >>>   arch/riscv/mm/physaddr.c                |   2 +- >>>   arch/riscv/mm/ptdump.c                  |   6 +- >>>   arch/riscv/mm/tlbflush.c                |  69 ++++++-- >>>   37 files changed, 901 insertions(+), 360 deletions(-) >>>   create mode 100644 arch/riscv/include/asm/kfence.h >>> >>> _______________________________________________ >>> linux-riscv mailing list >>> linux-riscv@lists.infradead.org >>> http://lists.infradead.org/mailman/listinfo/linux-riscv >>> > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, INCLUDES_PULL_REQUEST,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B36CFC07E96 for ; Thu, 15 Jul 2021 07:11:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A8566128D for ; Thu, 15 Jul 2021 07:11:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6A8566128D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ghiti.fr Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=0yHPoVaMfJCbkx07oCmm2DHXaRfCFLlm6aukkmcc0KE=; b=BRP6mCg7p/kEDcSSiyVuD9sPzq iZVmKjjbmEz/nywpNpNOP3oPnS/2VxxmXqNYQkN7hVNxdbMWfTzfVrm3oJ939lvDH0eBD4Ylaq8Wv TNo6J85bRCSo71i3x9D7bJu7QCQNN1QycZtTBlUdCAL6vr5pX80DKfd/nca/zVPnnbePwRwt47eU5 QpRzMKdRsSQkfnqHxEPLbVCCzaS4/zusxKkgPY6h7SmPDCKuYvWEl72TpdXNHeph6uNPw2fdC2OGr p6X+hX1dmgqYE6HEUgtZxmqkf9N3mSdFUe4Xel1ZPvEJY3rbvKLXUYbwBULoY6dDAX1pg48lEhgsu 6ZBVaG9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m3vWp-00HMjm-VQ; Thu, 15 Jul 2021 07:11:27 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m3vWl-00HMi0-84 for linux-riscv@lists.infradead.org; Thu, 15 Jul 2021 07:11:26 +0000 Received: (Authenticated sender: alex@ghiti.fr) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 2372D1C000A; Thu, 15 Jul 2021 07:11:15 +0000 (UTC) Subject: Re: [GIT PULL] RISC-V Patches for the 5.14 Merge Window, Part 1 To: Palmer Dabbelt Cc: Linus Torvalds , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Jisheng Zhang , Geert Uytterhoeven , Arnd Bergmann References: From: Alex Ghiti Message-ID: Date: Thu, 15 Jul 2021 09:11:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Language: fr X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210715_001123_618884_2BB04841 X-CRM114-Status: GOOD ( 31.57 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org SGkgUGFsbWVyLAoKTGUgMTEvMDcvMjAyMSDDoCAyMDo0NSwgUGFsbWVyIERhYmJlbHQgYSDDqWNy aXTCoDoKPiBPbiBGcmksIDA5IEp1bCAyMDIxIDEyOjU4OjEwIFBEVCAoLTA3MDApLCBhbGV4QGdo aXRpLmZyIHdyb3RlOgo+Pgo+Pgo+PiBMZSA5LzA3LzIwMjEgw6AgMTY6NTMsIFBhbG1lciBEYWJi ZWx0IGEgw6ljcml0wqA6Cj4+PiBUaGUgZm9sbG93aW5nIGNoYW5nZXMgc2luY2UgY29tbWl0IAo+ Pj4gOGE0MTAyYTBjZjA3Y2M3NmExOGYzNzNmNmI0OTQ4NTI1OGNjNmFmNDoKPj4+Cj4+PiDCoMKg IHJpc2N2OiBtbTogRml4IFcrWCBtYXBwaW5ncyBhdCBib290ICgyMDIxLTA2LTAxIDIxOjE1OjA5 IC0wNzAwKQo+Pj4KPj4+IGFyZSBhdmFpbGFibGUgaW4gdGhlIEdpdCByZXBvc2l0b3J5IGF0Ogo+ Pj4KPj4+IMKgwqAgZ2l0Oi8vZ2l0Lmtlcm5lbC5vcmcvcHViL3NjbS9saW51eC9rZXJuZWwvZ2l0 L3Jpc2N2L2xpbnV4LmdpdCAKPj4+IHRhZ3MvcmlzY3YtZm9yLWxpbnVzLTUuMTQtbXcwCj4+Pgo+ Pj4gZm9yIHlvdSB0byBmZXRjaCBjaGFuZ2VzIHVwIHRvIDE5NThlNWFlZjUwOThlMjhiN2Q2ZTZh Mjk3MjY0OTkwMWViZWNhY2U6Cj4+Pgo+Pj4gwqDCoCByaXNjdjogeGlwOiBGaXggZHVwbGljYXRl IGluY2x1ZGVkIGFzbS9wZ3RhYmxlLmggKDIwMjEtMDctMDYgCj4+PiAxNjoxNzo0MCAtMDcwMCkK Pj4+Cj4+PiAtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tCj4+PiBSSVNDLVYgUGF0Y2hlcyBmb3IgdGhlIDUuMTQgTWVyZ2UgV2lu ZG93LCBQYXJ0IDEKPj4+Cj4+PiBJbiBhZGRpdGlvbiB0byBXZSBoYXZlIGEgaGFuZGZ1bCBvZiBu ZXcgZmVhdHVyZXMgZm9yIDUuMTQ6Cj4+Pgo+Pj4gKiBTdXBwb3J0IGZvciB0cmFuc3BhcmVudCBo dWdlIHBhZ2VzLgo+Pj4gKiBTdXBwb3J0IGZvciBnZW5lcmljIFBDSSByZXNvdXJjZXMgbWFwcGlu Zy4KPj4+ICogU3VwcG9ydCBmb3IgdGhlIG1lbT0ga2VybmVsIHBhcmFtZXRlci4KPj4+ICogU3Vw cG9ydCBmb3IgS0ZFTkNFLgo+Pj4gKiBBIGhhbmRmdWwgb2YgZml4ZXMgdG8gYXZvaWQgVytYIG1h cHBpbmdzIGluIHRoZSBrZXJuZWwuCj4+PiAqIFN1cHBvcnQgZm9yIFZNQVBfU1RBQ0sgYmFzZWQg b3ZlcmZsb3cgZGV0ZWN0aW9uLgo+Pj4gKiBBbiBvcHRpbWl6ZWQgY29weV97dG8sZnJvbX1fdXNl ci4KPj4+IC0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0KPj4+IFRoZXJlIGFyZSBzb21lIEtjb25maWcgbWVyZ2UgY29uZmxpY3Rz LsKgIFRoZXkgc2hvdWxkIGJlIHByZXR0eQo+Pj4gc3RyYWlnaHQtZm9yd2FyZCwgYnV0IHdlIGRv IGhhdmUgYSBzeW1ib2wgb3V0IG9mIG9yZGVyIC0tIEkgdGhvdWdodCBJIAo+Pj4gaGFkIGEKPj4+ IHNjcmlwdCB0byBjaGVjayBmb3IgdGhhdCwgYnV0IEkgZ3Vlc3MgaXQgZG9lc24ndCB3b3JrLsKg IEkganVzdCBzZW50IAo+Pj4gb3V0IGEgcGF0Y2gKPj4+IHRvIGZpeCBpdCB1cC4KPj4+Cj4+PiBk aWZmIC0tY2MgYXJjaC9yaXNjdi9LY29uZmlnCj4+PiBpbmRleCAzNTkwZWI3NjAwMGUsNDY5YTcw YmQ4ZGE2Li5kMzZmM2M1MDI5ZmQKPj4+IC0tLSBhL2FyY2gvcmlzY3YvS2NvbmZpZwo+Pj4gKysr IGIvYXJjaC9yaXNjdi9LY29uZmlnCj4+PiBAQEAgLTYwLDEyIC02MSwxMSArNjEsMTIgQEBAIGNv bmZpZyBSSVNDCj4+PiDCoMKgwqDCoMKgwqDCoMKgIHNlbGVjdCBHRU5FUklDX1RJTUVfVlNZU0NB TEwgaWYgTU1VICYmIDY0QklUCj4+PiDCoMKgwqDCoMKgwqDCoMKgIHNlbGVjdCBIQU5ETEVfRE9N QUlOX0lSUQo+Pj4gwqDCoMKgwqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9BUkNIX0FVRElUU1lTQ0FM TAo+Pj4gLcKgwqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9BUkNIX0pVTVBfTEFCRUwKPj4+IC3CoMKg wqDCoMKgwqAgc2VsZWN0IEhBVkVfQVJDSF9KVU1QX0xBQkVMX1JFTEFUSVZFCj4+PiArwqDCoMKg wqDCoMKgIHNlbGVjdCBIQVZFX0FSQ0hfSlVNUF9MQUJFTCBpZiAhWElQX0tFUk5FTAo+Pj4gK8Kg wqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9BUkNIX0pVTVBfTEFCRUxfUkVMQVRJVkUgaWYgIVhJUF9L RVJORUwKPj4+IMKgwqDCoMKgwqDCoMKgwqAgc2VsZWN0IEhBVkVfQVJDSF9LQVNBTiBpZiBNTVUg JiYgNjRCSVQKPj4+IMKgwqDCoMKgwqDCoMKgwqAgc2VsZWN0IEhBVkVfQVJDSF9LQVNBTl9WTUFM TE9DIGlmIE1NVSAmJiA2NEJJVAo+Pj4gwqAgK8KgwqDCoMKgwqAgc2VsZWN0IEhBVkVfQVJDSF9L RkVOQ0UgaWYgTU1VICYmIDY0QklUCj4+PiAtwqDCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX0FSQ0hf S0dEQgo+Pj4gK8KgwqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9BUkNIX0tHREIgaWYgIVhJUF9LRVJO RUwKPj4+IMKgwqDCoMKgwqDCoMKgwqAgc2VsZWN0IEhBVkVfQVJDSF9LR0RCX1FYRkVSX1BLVAo+ Pj4gwqDCoMKgwqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9BUkNIX01NQVBfUk5EX0JJVFMgaWYgTU1V Cj4+PiDCoMKgwqDCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX0FSQ0hfU0VDQ09NUF9GSUxURVIKPj4+ IEBAQCAtODEsMTEgLTgwLDkgKzgyLDE0IEBAQAo+Pj4gwqDCoMKgwqDCoMKgwqDCoCBzZWxlY3Qg SEFWRV9HQ0NfUExVR0lOUwo+Pj4gwqDCoMKgwqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9HRU5FUklD X1ZEU08gaWYgTU1VICYmIDY0QklUCj4+PiDCoMKgwqDCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX0lS UV9USU1FX0FDQ09VTlRJTkcKPj4+IMKgICvCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX0tQUk9CRVMK Pj4+IMKgICvCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX0tQUk9CRVNfT05fRlRSQUNFCj4+PiDCoCAr wqDCoMKgwqDCoCBzZWxlY3QgSEFWRV9LUkVUUFJPQkVTCj4+PiArwqDCoMKgwqDCoMKgIHNlbGVj dCBIQVZFX0tQUk9CRVMgaWYgIVhJUF9LRVJORUwKPj4+ICvCoMKgwqDCoMKgwqAgc2VsZWN0IEhB VkVfS1BST0JFU19PTl9GVFJBQ0UgaWYgIVhJUF9LRVJORUwKPj4+ICvCoMKgwqDCoMKgwqAgc2Vs ZWN0IEhBVkVfS1JFVFBST0JFUyBpZiAhWElQX0tFUk5FTAo+Pj4gwqAgK8KgwqDCoMKgwqAgc2Vs ZWN0IEhBVkVfTU9WRV9QTUQKPj4+IMKgICvCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX01PVkVfUFVE Cj4+PiDCoMKgwqDCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX1BDSQo+Pj4gwqDCoMKgwqDCoMKgwqDC oCBzZWxlY3QgSEFWRV9QRVJGX0VWRU5UUwo+Pj4gwqDCoMKgwqDCoMKgwqDCoCBzZWxlY3QgSEFW RV9QRVJGX1JFR1MKPj4+IEBAQCAtMTA4LDcgLTEwNCw3ICsxMTIsOCBAQEAKPj4+IMKgwqDCoMKg wqDCoMKgwqAgc2VsZWN0IFNZU0NUTF9FWENFUFRJT05fVFJBQ0UKPj4+IMKgwqDCoMKgwqDCoMKg wqAgc2VsZWN0IFRIUkVBRF9JTkZPX0lOX1RBU0sKPj4+IMKgwqDCoMKgwqDCoMKgwqAgc2VsZWN0 IFVBQ0NFU1NfTUVNQ1BZIGlmICFNTVUKPj4+IMKgICvCoMKgwqDCoMKgIHNlbGVjdCBIQVZFX0FS Q0hfVFJBTlNQQVJFTlRfSFVHRVBBR0UgaWYgNjRCSVQgJiYgTU1VCj4+PiArwqDCoMKgwqDCoMKg IHNlbGVjdCBaT05FX0RNQTMyIGlmIDY0QklUCj4+Pgo+Pj4gwqDCoCBjb25maWcgQVJDSF9NTUFQ X1JORF9CSVRTX01JTgo+Pj4gwqDCoMKgwqDCoMKgwqDCoCBkZWZhdWx0IDE4IGlmIDY0QklUCj4+ PiAtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tCj4+PiBBa2lyYSBUc3VrYW1vdG8gKDEpOgo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2 OiBfX2FzbV9jb3B5X3RvLWZyb21fdXNlcjogT3B0aW1pemUgdW5hbGlnbmVkIG1lbW9yeSAKPj4+ IGFjY2VzcyBhbmQgcGlwZWxpbmUgc3RhbGwKPj4+Cj4+PiBBbGV4YW5kcmUgR2hpdGkgKDYpOgo+ Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBSZW1vdmUgQ09ORklHX1BIWVNfUkFNX0JBU0VfRklYRUQK Pj4+IMKgwqDCoMKgwqDCoCByaXNjdjogU2ltcGxpZnkgeGlwIGFuZCAheGlwIGtlcm5lbCBhZGRy ZXNzIGNvbnZlcnNpb24gbWFjcm9zCj4+Cj4+IEBQYWxtZXI6IEFzIHNhaWQgaW4gdGhlIHRocmVh ZCBvZiB0aGlzIHBhdGNoc2V0IG11bHRpcGxlIHRpbWVzLCB0aG9zZSAyCj4+IHBhdGNoZXMgc2hv dWxkIG5vdCBiZSBtZXJnZWQgYXMgaXQgYXNzdW1lcyB0aGF0IHRoZSBiYXNlIERSQU0gYWRkcmVz cyBpcwo+PiBhbHdheXMgMHg4MDAwXzAwMDAgZm9yIGFsbCBydjY0IHBsYXRmb3JtczogSSBkb24n dCB0aGluayBpdCBpcyB0cnVlLCAKPj4gaXMgaXQ/Cj4gCj4gU29ycnksIEkgcmVtZW1iZXIgc2F5 aW5nIHNvbWV0aGluZyBhYm91dCB0aGF0IGJ1dCBtdXN0IGhhdmUgbWlzc2VkIHRoZSAKPiByZXNw b3Nlc2VzLsKgIERvIHlvdSBoYXZlIGEgcG9pbnRlciB0byB0aGUgZGlzY3Vzc2lvbj/CoCBJZiB0 aGlzIGJyZWFrIAo+IHN0dWZmIEknbSBoYXBweSB0byByZXZlcnQgaXQsIHdoaWNoIGNhbiBiZSBk b25lIHBvc3QtcmMxLsKgIEkganVzdCBuZWVkIAo+IHRvIHNlZSB3aGF0J3MgYWN0dWFsbHkgYnJv a2VuIGZpcnN0LCBiZWNhdXNlIElJVUMgdGhpcyB3YXMgZGUtZmFjdG8gaG93IAo+IHRoaW5ncyB3 b3JrZWQgYWxyZWFkeS4KPiAKClJlYWxseSBzb3JyeSBhYm91dCBteSByZXNwb25zZSBkZWxheS4K ClRoZSB0aGluZyBpcyB0aGF0IHJlbW92aW5nIENPTkZJR19QSFlTX1JBTV9CQVNFX0ZJWEVEIGRl ZmluZXMgCkNPTkZJR19QSFlTX1JBTV9CQVNFIHRvIDB4ODAwMF8wMDAwIGZvciBhbGwgcnY2NCBj aGlwcywgYnV0IEkgYmVsaWV2ZSAKdGhpcyBpcyBpbXBsZW1lbnRhdGlvbiBzcGVjaWZpYzogZm9y IG5vdywgdGhpcyBiYXNlIGFkZHJlc3Mgd2FzIHBhc3NlZCAKaW50byB0aGUgZGV2aWNlIHRyZWUs IGFuZCBoZXJlIGl0IG1ha2VzIHRoaXMgdmFsdWUgc3RhdGljLgoKVGhpcyBpc3N1ZSB3aXRoIG15 IHBhdGNoIHdhcyBvcmlnaW5hbGx5IHBvaW50ZWQgYnkgSmlzaGVuZywgR2VlcnQgYW5kIEFybmQu CgpJZiB0aGlzIGlzIG5vdCBhIHByb2JsZW0gYW5kIHlvdSBoYXZlIGEgcG9pbnRlciB0byBhIGRv Y3VtZW50IHRoYXQgCnNwZWNpZmllcyB0aGlzLCBJIHdvdWxkIGJlIHZlcnkgaGFwcHkgdG8gaGF2 ZSB0aGUgbGluayA6KQoKVGhhbmtzIGFuZCBhZ2FpbiBzb3JyeSBhYm91dCBteSByZXNwb25zZSBk ZWxheSwKCkFsZXgKCj4+Cj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IEludHJvZHVjZSBzZXRfa2Vy bmVsX21lbW9yeSBoZWxwZXIKPj4+IMKgwqDCoMKgwqDCoCByaXNjdjogTWFwIHRoZSBrZXJuZWwg d2l0aCBjb3JyZWN0IHBlcm1pc3Npb25zIHRoZSBmaXJzdCB0aW1lCj4+PiDCoMKgwqDCoMKgwqAg cmlzY3Y6IEludHJvZHVjZSBzdHJ1Y3R1cmUgdGhhdCBncm91cCBhbGwgdmFyaWFibGVzIHJlZ2Fy ZGluZyAKPj4+IGtlcm5lbCBtYXBwaW5nCj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IEZpeCBQVERV TVAgb3V0cHV0IG5vdyBCUEYgcmVnaW9uIG1vdmVkIGJhY2sgdG8gbW9kdWxlIAo+Pj4gcmVnaW9u Cj4+Pgo+Pj4gQml4dWFuIEN1aSAoMSk6Cj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IGZpeCBidWls ZCBlcnJvciB3aGVuIENPTkZJR19TTVAgaXMgZGlzYWJsZWQKPj4+Cj4+PiBDaHJpc3RvcGggSGVs bHdpZyAoMSk6Cj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IHBhc3MgdGhlIG1tX3N0cnVjdCB0byBf X3NiaV90bGJfZmx1c2hfcmFuZ2UKPj4+Cj4+PiBHdW8gUmVuICgzKToKPj4+IMKgwqDCoMKgwqDC oCByaXNjdjogVXNlIGdsb2JhbCBtYXBwaW5ncyBmb3Iga2VybmVsIHBhZ2VzCj4+PiDCoMKgwqDC oMKgwqAgcmlzY3Y6IENsZWFudXAgdW51c2VkIGZ1bmN0aW9ucwo+Pj4gwqDCoMKgwqDCoMKgIHJp c2N2OiBhZGQgQVNJRC1iYXNlZCB0bGJmbHVzaGluZyBtZXRob2RzCj4+Pgo+Pj4gSmVmZiBYaWUg KDEpOgo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBwdHJhY2U6IGFkZCBhcmduIHN5bnRheAo+Pj4K Pj4+IEppYXBlbmcgQ2hvbmcgKDEpOgo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiB4aXA6IEZpeCBk dXBsaWNhdGUgaW5jbHVkZWQgYXNtL3BndGFibGUuaAo+Pj4KPj4+IEppc2hlbmcgWmhhbmcgKDcp Ogo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBtcmVtYXAgc3BlZWR1cCAtIGVuYWJsZSBIQVZFX01P VkVfUFVEIGFuZCBIQVZFX01PVkVfUE1ECj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IG1tOiBSZW1v dmUgc2V0dXBfemVyb19wYWdlKCkKPj4+IMKgwqDCoMKgwqDCoCByaXNjdjogT3B0aW1pemUgc3dp dGNoX21tIGJ5IHBhc3NpbmcgImNwdSIgdG8gCj4+PiBmbHVzaF9pY2FjaGVfZGVmZXJyZWQoKQo+ Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBUdXJuIGhhc19mcHUgaW50byBhIHN0YXRpYyBrZXkgaWYg RlBVPXkKPj4+IMKgwqDCoMKgwqDCoCByaXNjdjoga3Byb2JlczogUmVtb3ZlIHJlZHVuZGFudCBr cHJvYmVfc3RlcF9jdHgKPj4+IMKgwqDCoMKgwqDCoCByaXNjdjogQWRkIF9faW5pdCBzZWN0aW9u IG1hcmtlciB0byBzb21lIGZ1bmN0aW9ucyBhZ2Fpbgo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBt bTogaW5pdDogQ29uc29saWRhdGUgdmFycywgZnVuY3Rpb25zCj4+Pgo+Pj4gS2VmZW5nIFdhbmcg KDUpOgo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBNb3ZlIHNldHVwX2Jvb3RtZW0gaW50byBwYWdp bmdfaW5pdAo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBtbTogRHJvcCByZWR1bmRhbnQgX3NkYXRh IGFuZCBfZWRhdGEgZGVjbGFyYXRpb24KPj4+IMKgwqDCoMKgwqDCoCByaXNjdjogbW06IFVzZSBi ZXR0ZXIgYml0bWFwX3phbGxvYygpCj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IE9ubHkgaW5pdGlh bGl6ZSBzd2lvdGxiIHdoZW4gbmVjZXNzYXJ5Cj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IEFkZCBt ZW0ga2VybmVsIHBhcmFtZXRlciBzdXBwb3J0Cj4+Pgo+Pj4gTGl1IFNoaXhpbiAoMSk6Cj4+PiDC oMKgwqDCoMKgwqAgcmlzY3Y6IEVuYWJsZSBLRkVOQ0UgZm9yIHJpc2N2NjQKPj4+Cj4+PiBOYW55 b25nIFN1biAoNSk6Cj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IG1tOiBhZGQgX1BBR0VfTEVBRiBt YWNybwo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBtbTogbWFrZSBwbWRfYmFkKCkgY2hlY2sgbGVh ZiBjb25kaXRpb24KPj4+IMKgwqDCoMKgwqDCoCByaXNjdjogbW06IGFkZCBwYXJhbSBzdHJpZGUg Zm9yIF9fc2JpX3RsYl9mbHVzaF9yYW5nZQo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBtbTogYWRk IFRIUCBzdXBwb3J0IG9uIDY0LWJpdAo+Pj4gwqDCoMKgwqDCoMKgIHJpc2N2OiBtbTogZml4IGJ1 aWxkIGVycm9ycyBjYXVzZWQgYnkgbWtfcG1kKCkKPj4+Cj4+PiBQYWxtZXIgRGFiYmVsdCAoMik6 Cj4+PiDCoMKgwqDCoMKgwqAgUklTQy1WOiBVc2UgYXNtLWdlbmVyaWMgZm9yIHtpbixvdXR9e2J3 bHF9Cj4+PiDCoMKgwqDCoMKgwqAgTWVyZ2UgYnJhbmNoICdyaXNjdi13eC1tYXBwaW5ncycgaW50 byBmb3ItbmV4dAo+Pj4KPj4+IFJhbmR5IER1bmxhcCAoMSk6Cj4+PiDCoMKgwqDCoMKgwqAgcmlz Y3Y6IFRSQU5TUEFSRU5UX0hVR0VQQUdFOiBkZXBlbmRzIG9uIE1NVQo+Pj4KPj4+IFN0YW5pc2xh dyBLYXJkYWNoICgxKToKPj4+IMKgwqDCoMKgwqDCoCByaXNjdjogZW5hYmxlIGdlbmVyaWMgUENJ IHJlc291cmNlIG1hcHBpbmcKPj4+Cj4+PiBUb25nIFRpYW5nZW4gKDEpOgo+Pj4gwqDCoMKgwqDC oMKgIHJpc2N2OiBhZGQgVk1BUF9TVEFDSyBvdmVyZmxvdyBkZXRlY3Rpb24KPj4+Cj4+PiBWaXRh bHkgV29vbCAoMSk6Cj4+PiDCoMKgwqDCoMKgwqAgcmlzY3Y6IGZpeCB0eXBvIGluIGluaXQuYwo+ Pj4KPj4+IMKgIGFyY2gvcmlzY3YvS2NvbmZpZ8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoCB8wqAgMTIgKy0KPj4+IMKgIGFyY2gvcmlzY3YvaW5jbHVkZS9hc20vYXNt LXByb3RvdHlwZXMuaCB8wqDCoCAzICsKPj4+IMKgIGFyY2gvcmlzY3YvaW5jbHVkZS9hc20vaW8u aMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCB8wqAgMTMgLS0KPj4+IMKgIGFyY2gvcmlzY3YvaW5j bHVkZS9hc20va2ZlbmNlLmjCoMKgwqDCoMKgwqDCoMKgIHzCoCA2MyArKysrKysrCj4+PiDCoCBh cmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2twcm9iZXMuaMKgwqDCoMKgwqDCoMKgIHzCoMKgIDcgLQo+ Pj4gwqAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9tbXVfY29udGV4dC5owqDCoMKgIHzCoMKgIDIg Kwo+Pj4gwqAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9wYWdlLmjCoMKgwqDCoMKgwqDCoMKgwqDC oCB8wqAgODEgKysrKystLS0tCj4+PiDCoCBhcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3BjaS5owqDC oMKgwqDCoMKgwqDCoMKgwqDCoCB8wqDCoCAyICsKPj4+IMKgIGFyY2gvcmlzY3YvaW5jbHVkZS9h c20vcGd0YWJsZS02NC5owqDCoMKgwqAgfMKgwqAgNSArLQo+Pj4gwqAgYXJjaC9yaXNjdi9pbmNs dWRlL2FzbS9wZ3RhYmxlLWJpdHMuaMKgwqAgfMKgwqAgNSArCj4+PiDCoCBhcmNoL3Jpc2N2L2lu Y2x1ZGUvYXNtL3BndGFibGUuaMKgwqDCoMKgwqDCoMKgIHwgMTcxICsrKysrKysrKysrKysrKysr Ky0KPj4+IMKgIGFyY2gvcmlzY3YvaW5jbHVkZS9hc20vcHRyYWNlLmjCoMKgwqDCoMKgwqDCoMKg IHzCoCAzMSArKysrCj4+PiDCoCBhcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3NlY3Rpb25zLmjCoMKg wqDCoMKgwqAgfMKgIDE3ICsrCj4+PiDCoCBhcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3NldF9tZW1v cnkuaMKgwqDCoMKgIHzCoCAyNCArKy0KPj4+IMKgIGFyY2gvcmlzY3YvaW5jbHVkZS9hc20vc3dp dGNoX3RvLmjCoMKgwqDCoMKgIHzCoCAxMSArLQo+Pj4gwqAgYXJjaC9yaXNjdi9pbmNsdWRlL2Fz bS90aHJlYWRfaW5mby5owqDCoMKgIHzCoCAxNSArKwo+Pj4gwqAgYXJjaC9yaXNjdi9pbmNsdWRl L2FzbS90bGJmbHVzaC5owqDCoMKgwqDCoMKgIHzCoMKgIDUgKwo+Pj4gwqAgYXJjaC9yaXNjdi9r ZXJuZWwvYXNtLW9mZnNldHMuY8KgwqDCoMKgwqDCoMKgwqAgfMKgwqAgMiArCj4+PiDCoCBhcmNo L3Jpc2N2L2tlcm5lbC9jcHVmZWF0dXJlLmPCoMKgwqDCoMKgwqDCoMKgwqAgfMKgwqAgNiArLQo+ Pj4gwqAgYXJjaC9yaXNjdi9rZXJuZWwvZW50cnkuU8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqAgfCAxMDggKysrKysrKysrKysrCj4+PiDCoCBhcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLlPCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgfMKgwqAgNCArLQo+Pj4gwqAgYXJjaC9yaXNjdi9r ZXJuZWwva2V4ZWNfcmVsb2NhdGUuU8KgwqDCoMKgwqAgfMKgwqAgNCArLQo+Pj4gwqAgYXJjaC9y aXNjdi9rZXJuZWwvbWFjaGluZV9rZXhlYy5jwqDCoMKgwqDCoMKgIHzCoMKgIDIgKy0KPj4+IMKg IGFyY2gvcmlzY3Yva2VybmVsL3Byb2Jlcy9rcHJvYmVzLmPCoMKgwqDCoMKgIHzCoCA0MCArLS0t LQo+Pj4gwqAgYXJjaC9yaXNjdi9rZXJuZWwvcHJvY2Vzcy5jwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgIHzCoMKgIDIgKy0KPj4+IMKgIGFyY2gvcmlzY3Yva2VybmVsL3NldHVwLmPCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgIHzCoCAxOCArLQo+Pj4gwqAgYXJjaC9yaXNjdi9rZXJuZWwvc2ln bmFsLmPCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCB8wqDCoCA0ICstCj4+PiDCoCBhcmNoL3Jp c2N2L2tlcm5lbC90cmFwcy5jwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCB8wqAgMzUgKysr Kwo+Pj4gwqAgYXJjaC9yaXNjdi9rZXJuZWwvdm1saW51eC14aXAubGRzLlPCoMKgwqDCoCB8wqDC oCAxIC0KPj4+IMKgIGFyY2gvcmlzY3Yva2VybmVsL3ZtbGludXgubGRzLlPCoMKgwqDCoMKgwqDC oMKgIHzCoMKgIDIgKy0KPj4+IMKgIGFyY2gvcmlzY3YvbGliL3VhY2Nlc3MuU8KgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoCB8IDE4MSArKysrKysrKysrKysrKysrLS0tLQo+Pj4gwqAgYXJj aC9yaXNjdi9tbS9jb250ZXh0LmPCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCB8wqAg MTQgKy0KPj4+IMKgIGFyY2gvcmlzY3YvbW0vZmF1bHQuY8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoCB8wqAgMTEgKy0KPj4+IMKgIGFyY2gvcmlzY3YvbW0vaW5pdC5jwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgfCAyODMgCj4+PiArKysrKysrKysrKysr KystLS0tLS0tLS0tLS0tLS0tLQo+Pj4gwqAgYXJjaC9yaXNjdi9tbS9waHlzYWRkci5jwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHzCoMKgIDIgKy0KPj4+IMKgIGFyY2gvcmlzY3YvbW0v cHRkdW1wLmPCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHzCoMKgIDYgKy0KPj4+ IMKgIGFyY2gvcmlzY3YvbW0vdGxiZmx1c2guY8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oCB8wqAgNjkgKysrKysrLS0KPj4+IMKgIDM3IGZpbGVzIGNoYW5nZWQsIDkwMSBpbnNlcnRpb25z KCspLCAzNjAgZGVsZXRpb25zKC0pCj4+PiDCoCBjcmVhdGUgbW9kZSAxMDA2NDQgYXJjaC9yaXNj di9pbmNsdWRlL2FzbS9rZmVuY2UuaAo+Pj4KPj4+IF9fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fCj4+PiBsaW51eC1yaXNjdiBtYWlsaW5nIGxpc3QKPj4+IGxp bnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKPj4+IGh0dHA6Ly9saXN0cy5pbmZyYWRlYWQu b3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtcmlzY3YKPj4+Cj4gCj4gX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KPiBsaW51eC1yaXNjdiBtYWlsaW5nIGxp c3QKPiBsaW51eC1yaXNjdkBsaXN0cy5pbmZyYWRlYWQub3JnCj4gaHR0cDovL2xpc3RzLmluZnJh ZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtcmlzY3YgbWFpbGluZyBsaXN0Cmxp bnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcv bWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgo=