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* Re: [PATCH v12 00/11] Add support for Hikey 970 PCIe
@ 2021-10-09  1:44 ` Songxiaowei (Kirin_DRV)
  0 siblings, 0 replies; 16+ messages in thread
From: Songxiaowei (Kirin_DRV) @ 2021-10-09  1:44 UTC (permalink / raw)
  To: Lorenzo Pieralisi, Mauro Carvalho Chehab
  Cc: Bjorn Helgaas, Bjorn Helgaas, Linuxarm, Mauro Carvalho Chehab,
	Krzysztof Wilczyński, Wangbinghui (Biggio, Kirin_DRV),
	Rob Herring, linux-kernel, linux-pci, linux-phy

Ack-by Xiaowei Song.

> Hi Lorenzo,
> 
> Em Thu, 7 Oct 2021 15:41:03 +0100
> Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> escreveu:
> 
> > On Tue, Oct 05, 2021 at 01:23:21PM -0500, Bjorn Helgaas wrote:
> > > [+cc Lorenzo]
> > > 
> > > On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:  
> > > > Hi Bjorn,
> > > > 
> > > > Em Tue, 28 Sep 2021 09:34:10 +0200
> > > > Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:  
> > >   
> > > > >   PCI: kirin: Reorganize the PHY logic inside the driver
> > > > >   PCI: kirin: Add support for a PHY layer
> > > > >   PCI: kirin: Use regmap for APB registers
> > > > >   PCI: kirin: Add support for bridge slot DT schema
> > > > >   PCI: kirin: Add Kirin 970 compatible
> > > > >   PCI: kirin: Add MODULE_* macros
> > > > >   PCI: kirin: Allow building it as a module
> > > > >   PCI: kirin: Add power_off support for Kirin 960 PHY
> > > > >   PCI: kirin: fix poweroff sequence
> > > > >   PCI: kirin: Allow removing the driver  
> > > > 
> > > > I guess everything is already satisfying the review feedbacks.
> > > > If so, could you please merge the PCI ones?  
> > > 
> > > Lorenzo takes care of the native host bridge drivers, so I'm sure this
> > > is on his list.  I added him to cc: in case not.  
> > 
> > Ideally I'd like to see these patches ACKed/Review-ed by the kirin
> > maintainers - that's what I was waiting for and that's what they
> > are there for.
> > 
> > Having said that, I will keep an eye on this series so that we
> > can hopefully queue it for v5.16.
> 
> Not sure if you received the e-mail from Xiaowei with his ack.

I have not (and it did not make it to linux-pci either).

> At least here, I only received on my internal e-mail (perhaps because
> the original e-mail was base64-encoded with gb2312 charset). 
> 
> So, let me forward his answer to you, c/c the mailing lists.

Patches should be acked with tags that tooling recognize, this
would help me.

> Thanks,
> Mauro
> 

Thanks.

^ permalink raw reply	[flat|nested] 16+ messages in thread
* [PATCH v12 00/11] Add support for Hikey 970 PCIe
@ 2021-09-28  7:34 ` Mauro Carvalho Chehab
  0 siblings, 0 replies; 16+ messages in thread
From: Mauro Carvalho Chehab @ 2021-09-28  7:34 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: linuxarm, mauro.chehab, Mauro Carvalho Chehab,
	Krzysztof Wilczyński, Binghui Wang, Rob Herring,
	Xiaowei Song, linux-kernel, linux-pci, linux-phy

The pcie-kirin PCIe driver contains internally a PHY interface for
Kirin 960, but it misses support for Kirin 970.

Patch1 contains a PHY for Kirin 970 PCIe.

The remaining patches add support for Kirin 970 at the pcie-kirin driver, and
add the needed logic to compile it as module and to allow to dynamically
remove the driver in runtime.

Tested on HiKey970:

  # lspci -D -PP
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
  0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809
  0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)

Tested on HiKey960:

  # lspci -D 
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)

---

v12:
  - Change a comment at patch 1 to not use c99 style.

v11:
  - patch 5 changed to use the right PCIe topology
  - all other patches are identical to v10.

v10:
  - patch 1: dropped magic numbers from PHY driver
  - patch 5: allow pcie child nodes without reset-gpios
  - all other patches are identical to v9.

v9:
  - Did some cleanups at patches 1 and 5



Mauro Carvalho Chehab (11):
  phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
  PCI: kirin: Reorganize the PHY logic inside the driver
  PCI: kirin: Add support for a PHY layer
  PCI: kirin: Use regmap for APB registers
  PCI: kirin: Add support for bridge slot DT schema
  PCI: kirin: Add Kirin 970 compatible
  PCI: kirin: Add MODULE_* macros
  PCI: kirin: Allow building it as a module
  PCI: kirin: Add power_off support for Kirin 960 PHY
  PCI: kirin: fix poweroff sequence
  PCI: kirin: Allow removing the driver

 drivers/pci/controller/dwc/Kconfig      |   2 +-
 drivers/pci/controller/dwc/pcie-kirin.c | 644 +++++++++++++-----
 drivers/phy/hisilicon/Kconfig           |  10 +
 drivers/phy/hisilicon/Makefile          |   1 +
 drivers/phy/hisilicon/phy-hi3670-pcie.c | 845 ++++++++++++++++++++++++
 5 files changed, 1354 insertions(+), 148 deletions(-)
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c

-- 
2.31.1



^ permalink raw reply	[flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-10-12 13:06 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-09  1:44 [PATCH v12 00/11] Add support for Hikey 970 PCIe Songxiaowei (Kirin_DRV)
2021-10-09  1:44 ` Songxiaowei (Kirin_DRV)
2021-10-12 13:06 ` Lorenzo Pieralisi
2021-10-12 13:06   ` Lorenzo Pieralisi
  -- strict thread matches above, loose matches on Subject: below --
2021-09-28  7:34 Mauro Carvalho Chehab
2021-09-28  7:34 ` Mauro Carvalho Chehab
2021-10-05  9:24 ` Mauro Carvalho Chehab
2021-10-05  9:24   ` Mauro Carvalho Chehab
2021-10-05 18:23   ` Bjorn Helgaas
2021-10-05 18:23     ` Bjorn Helgaas
2021-10-07 14:41     ` Lorenzo Pieralisi
2021-10-07 14:41       ` Lorenzo Pieralisi
2021-10-08 10:55       ` Mauro Carvalho Chehab
2021-10-08 10:55         ` Mauro Carvalho Chehab
2021-10-08 17:34         ` Lorenzo Pieralisi
2021-10-08 17:34           ` Lorenzo Pieralisi

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