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From: Michal Simek <michal.simek@xilinx.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Michal Simek <michal.simek@xilinx.com>
Cc: linux-kernel@vger.kernel.org, monstr@monstr.eu, git@xilinx.com,
	arnd@arndb.de, Stefan Asserhall <stefan.asserhall@xilinx.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	Will Deacon <will@kernel.org>
Subject: Re: [PATCH 3/7] microblaze: Define SMP safe bit operations
Date: Thu, 13 Feb 2020 09:42:49 +0100	[thread overview]
Message-ID: <cd4c6117-bc61-620c-8477-44df6e51d7b8@xilinx.com> (raw)
In-Reply-To: <20200212155309.GA14973@hirez.programming.kicks-ass.net>

On 12. 02. 20 16:53, Peter Zijlstra wrote:
> On Wed, Feb 12, 2020 at 04:42:25PM +0100, Michal Simek wrote:
>> From: Stefan Asserhall <stefan.asserhall@xilinx.com>
>>
>> For SMP based system there is a need to have proper bit operations.
>> Microblaze is using exclusive load and store instructions.
>>
>> Signed-off-by: Stefan Asserhall <stefan.asserhall@xilinx.com>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> 
>> +/*
>> + * clear_bit doesn't imply a memory barrier
>> + */
>> +#define smp_mb__before_clear_bit()	smp_mb()
>> +#define smp_mb__after_clear_bit()	smp_mb()
> 
> These macros no longer exist.

ok. Easy to remove.

> 
> Also, might I draw your attention to:
> 
>   include/asm-generic/bitops/atomic.h
> 
> This being a ll/sc arch, I'm thinking that if you do your atomic_t
> implementation right, the generic atomic bitop code should be near
> optimal.
> 

Based on my look it looks like that I can replace implementations in
this file by sourcing which will be using atomic operations.

#include <asm-generic/bitops/atomic.h>
#include <asm-generic/bitops/lock.h>

Correct?

Would be good to run any testsuite to prove that all operations works as
expected. Is there any testsuite I can use to confirm it?

Thanks,
Michal

  reply	other threads:[~2020-02-13  8:43 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-12 15:42 [PATCH 0/7] microblaze: Define SMP safe operations Michal Simek
2020-02-12 15:42 ` [PATCH 1/7] microblaze: timer: Don't use cpu timer setting Michal Simek
2020-02-12 15:42 ` [PATCH 2/7] microblaze: Make cpuinfo structure SMP aware Michal Simek
2020-02-12 20:42   ` Arnd Bergmann
2020-02-12 15:42 ` [PATCH 3/7] microblaze: Define SMP safe bit operations Michal Simek
2020-02-12 15:53   ` Peter Zijlstra
2020-02-13  8:42     ` Michal Simek [this message]
2020-02-13  9:01       ` Stefan Asserhall
2020-02-13  9:11         ` Peter Zijlstra
2020-02-13  9:24           ` Stefan Asserhall
2020-02-12 15:42 ` [PATCH 4/7] microblaze: Add SMP implementation of xchg and cmpxchg Michal Simek
2020-02-12 15:42 ` [PATCH 5/7] microblaze: Remove disabling IRQ while pte_update() run Michal Simek
2020-02-12 15:42 ` [PATCH 6/7] microblaze: Implement architecture spinlock Michal Simek
2020-02-12 15:47   ` Peter Zijlstra
2020-02-13  7:51     ` Michal Simek
2020-02-13  8:00       ` Peter Zijlstra
2020-02-12 15:42 ` [PATCH 7/7] microblaze: Do atomic operations by using exclusive ops Michal Simek
2020-02-12 15:55   ` Peter Zijlstra
2020-02-13  8:06     ` Michal Simek
2020-02-13  8:58       ` Peter Zijlstra
2020-02-13  9:16         ` Peter Zijlstra
2020-02-13 10:04           ` Will Deacon
2020-02-13 10:14             ` Stefan Asserhall
2020-02-13 10:20               ` Will Deacon
2020-02-13 10:15             ` Peter Zijlstra
2020-02-13 11:34         ` Boqun Feng
2020-02-13 11:38           ` Boqun Feng
2020-02-13 13:51             ` Andrea Parri
2020-02-13 14:01               ` Andrea Parri
2020-02-12 16:08 ` [PATCH 0/7] microblaze: Define SMP safe operations Peter Zijlstra
2020-02-12 16:38   ` Peter Zijlstra
2020-02-13  7:49   ` Michal Simek
2020-02-13  8:11     ` Peter Zijlstra
2020-02-13  8:12       ` Michal Simek

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