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From: Vidya Sagar <vidyas@nvidia.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <helgaas@kernel.org>
Cc: <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>,
	<bhelgaas@google.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>,
	"Alan Mikhak" <alan.mikhak@sifive.com>
Subject: Re: [PATCH] PCI: dwc: Warn only for non-prefetchable memory resource size >4GB
Date: Tue, 19 May 2020 19:25:02 +0530	[thread overview]
Message-ID: <cd62a9da-5c47-ceb2-10e7-4cf657f07801@nvidia.com> (raw)
In-Reply-To: <20200518155435.GA2299@e121166-lin.cambridge.arm.com>



On 18-May-20 9:24 PM, Lorenzo Pieralisi wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Wed, May 13, 2020 at 05:35:08PM -0500, Bjorn Helgaas wrote:
>> [+cc Alan; please cc authors of relevant commits,
>> updated Andrew's email address]
>>
>> On Thu, May 14, 2020 at 12:38:55AM +0530, Vidya Sagar wrote:
>>> commit 9e73fa02aa009 ("PCI: dwc: Warn if MEM resource size exceeds max for
>>> 32-bits") enables warning for MEM resources of size >4GB but prefetchable
>>>   memory resources also come under this category where sizes can go beyond
>>> 4GB. Avoid logging a warning for prefetchable memory resources.
>>>
>>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>>> ---
>>>   drivers/pci/controller/dwc/pcie-designware-host.c | 3 ++-
>>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
>>> index 42fbfe2a1b8f..a29396529ea4 100644
>>> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
>>> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
>>> @@ -366,7 +366,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
>>>                      pp->mem = win->res;
>>>                      pp->mem->name = "MEM";
>>>                      mem_size = resource_size(pp->mem);
>>> -                   if (upper_32_bits(mem_size))
>>> +                   if (upper_32_bits(mem_size) &&
>>> +                       !(win->res->flags & IORESOURCE_PREFETCH))
>>>                              dev_warn(dev, "MEM resource size exceeds max for 32 bits\n");
>>>                      pp->mem_size = mem_size;
>>>                      pp->mem_bus_addr = pp->mem->start - win->offset;
> 
> That warning was added for a reason - why should not we log legitimate
> warnings ? AFAIU having resources larger than 4GB can lead to undefined
> behaviour given the current ATU programming API.
Yeah. I'm all for a warning if the size is larger than 4GB in case of
non-prefetchable window as one of the ATU outbound translation channels 
is being used, but, we are not employing any ATU outbound translation 
channel for prefetchable window and they can be greater than 4GB in size 
for all right reasons. So, logging a warning for prefetchable region 
doesn't seem correct to me. Please let me know if my understanding is wrong.

- Vidya Sagar
> 
> Alan ? I want to understand what's the best course of action before
> merging these patches.
> 
> Lorenzo
> 

  reply	other threads:[~2020-05-19 13:55 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-13 19:08 [PATCH] PCI: dwc: Warn only for non-prefetchable memory resource size >4GB Vidya Sagar
2020-05-13 22:35 ` Bjorn Helgaas
2020-05-18 15:54   ` Lorenzo Pieralisi
2020-05-19 13:55     ` Vidya Sagar [this message]
2020-05-19 14:58       ` Lorenzo Pieralisi
2020-05-19 17:08         ` Vidya Sagar
2020-05-19 18:20           ` Lorenzo Pieralisi
2020-05-19 22:08         ` Gustavo Pimentel
2020-05-20  2:33           ` Alan Mikhak
2020-05-22 14:04             ` Lorenzo Pieralisi
2020-05-20 11:06           ` [PATCH] " Lorenzo Pieralisi
2020-05-20 13:16             ` Thierry Reding
2020-05-20 17:51               ` Vidya Sagar
2020-05-20 11:17           ` Thierry Reding
2020-05-20 17:46             ` Vidya Sagar
2020-05-20 22:48               ` Rob Herring
2020-05-22 12:06                 ` Thierry Reding
2020-05-22 13:32                   ` Lorenzo Pieralisi
2020-05-22 14:06                     ` Thierry Reding
2020-05-23 17:30                       ` Vidya Sagar
2020-06-02 10:13                         ` Vidya Sagar

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