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From: "Arınç ÜNAL" <arinc.unal@arinc9.com>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: linux-clk@vger.kernel.org, linux-mips@vger.kernel.org,
	tsbogend@alpha.franken.de, john@phrozen.org,
	linux-kernel@vger.kernel.org, p.zabel@pengutronix.de,
	mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 1/9] dt-bindings: clock: add mtmips SoCs system controller
Date: Tue, 21 Mar 2023 10:09:59 +0300	[thread overview]
Message-ID: <ce13ca6c-e61a-d31e-2626-d818a5d0e15e@arinc9.com> (raw)
In-Reply-To: <CAMhs-H_dSgcPNQVusHWVvztYHptOxSJ_o7G0eU9=M1C7RXdsVw@mail.gmail.com>

On 21.03.2023 10:00, Sergio Paracuellos wrote:
> On Tue, Mar 21, 2023 at 7:45 AM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 21/03/2023 06:00, Sergio Paracuellos wrote:
>>> Adds device tree binding documentation for system controller node present
>>> in Mediatek MIPS and Ralink SOCs. This node is a clock and reset provider
>>> for the rest of the world. This covers RT2880, RT3050, RT3052, RT3350,
>>> RT3883, RT5350, MT7620, MT7628 and MT7688 SoCs.
>>>
>>> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
>>> ---
>>>   .../bindings/clock/mediatek,mtmips-sysc.yaml  | 65 +++++++++++++++++++
>>>   1 file changed, 65 insertions(+)
>>>   create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
>>> new file mode 100644
>>> index 000000000000..f07e1652723b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
>>> @@ -0,0 +1,65 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/clock/mediatek,mtmips-sysc.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: MTMIPS SoCs System Controller
>>> +
>>> +maintainers:
>>> +  - Sergio Paracuellos <sergio.paracuellos@gmail.com>
>>> +
>>> +description: |
>>> +  MediaTek MIPS and Ralink SoCs provides a system controller to allow
>>> +  to access to system control registers. These registers include clock
>>> +  and reset related ones so this node is both clock and reset provider
>>> +  for the rest of the world.
>>> +
>>> +  These SoCs have an XTAL from where the cpu clock is
>>> +  provided as well as derived clocks for the bus and the peripherals.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - enum:
>>> +          - ralink,mt7620-sysc
>>
>> Since you decided to send it before we finish discussion:
>> NAK - this is already used as mediatek
> 
> Sorry, there was too much stuff commented so I preferred to clean up
> all of them while maintaining the compatibles with the ralink prefix
> instead since that was where the current discussion was at that point.
> 
>>
>>> +          - ralink,mt7620a-sysc
> 
> As I have said, this one exists:
> 
> arch/mips/ralink/mt7620.c:      rt_sysc_membase =
> plat_of_remap_node("ralink,mt7620a-sysc");
> 
> 
>>> +          - ralink,mt7628-sysc
>>
>> Same here.
>>
>>> +          - ralink,mt7688-sysc
>>
>> I expect you to check the others.
> 
> I can change others to mediatek but that would be a bit weird, don't you think?

I've seen some parts of the MTMIPS platform use mediatek compatible 
strings thanks to Krzysztof pointing them out. I don't like having some 
parts of the MTMIPS platform (pci, mmc, usbphy, etc.) with mediatek 
compatible string while others are ralink.

Like Krzysztof said [0], Ralink is now Mediatek, thus there is no 
conflict and no issues with different vendor used. So I'd rather keep 
new things Ralink and gradually change these mediatek strings to ralink.

[0] https://patchwork.kernel.org/comment/25232828/

Arınç

  reply	other threads:[~2023-03-21  7:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-21  5:00 [PATCH v2 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 1/9] dt-bindings: clock: add mtmips SoCs system controller Sergio Paracuellos
2023-03-21  6:45   ` Krzysztof Kozlowski
2023-03-21  7:00     ` Sergio Paracuellos
2023-03-21  7:09       ` Arınç ÜNAL [this message]
2023-03-21 22:18         ` Rob Herring
2023-03-22  8:35           ` Arınç ÜNAL
2023-03-22  8:57             ` Sergio Paracuellos
2023-03-21  7:16       ` Krzysztof Kozlowski
2023-03-21  7:35         ` Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-04-13 18:55   ` Stephen Boyd
2023-04-14  5:49     ` Sergio Paracuellos
2023-04-18  0:50       ` Stephen Boyd
2023-04-18  3:12         ` Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 3/9] mips: ralink: rt288x: remove clock related code Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 4/9] mips: ralink: rt305x: " Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 5/9] mips: ralink: rt3883: " Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 6/9] mips: ralink: mt7620: " Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 7/9] mips: ralink: remove reset " Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 8/9] mips: ralink: get cpu rate from new driver code Sergio Paracuellos
2023-03-21  5:00 ` [PATCH v2 9/9] MAINTAINERS: add Mediatek MTMIPS Clock maintainer Sergio Paracuellos
2023-04-13  8:44 ` [PATCH v2 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-04-13 18:56   ` Stephen Boyd
2023-04-14  5:18     ` Sergio Paracuellos

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