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([2001:b07:6468:f312:9c71:ae6b:ee1c:2d9e]) by smtp.gmail.com with ESMTPSA id b82sm193680wmh.1.2020.04.08.09.50.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Apr 2020 09:50:24 -0700 (PDT) Subject: Re: [PATCH v2] x86/kvm: Disable KVM_ASYNC_PF_SEND_ALWAYS To: Sean Christopherson Cc: Thomas Gleixner , Andy Lutomirski , Vivek Goyal , Peter Zijlstra , Andy Lutomirski , LKML , X86 ML , kvm list , stable References: <20200407172140.GB64635@redhat.com> <772A564B-3268-49F4-9AEA-CDA648F6131F@amacapital.net> <87eeszjbe6.fsf@nanos.tec.linutronix.de> <874ktukhku.fsf@nanos.tec.linutronix.de> <274f3d14-08ac-e5cc-0b23-e6e0274796c8@redhat.com> <20200408153413.GA11322@linux.intel.com> From: Paolo Bonzini Message-ID: Date: Wed, 8 Apr 2020 18:50:22 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200408153413.GA11322@linux.intel.com> Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/04/20 17:34, Sean Christopherson wrote: > On Wed, Apr 08, 2020 at 10:23:58AM +0200, Paolo Bonzini wrote: >> Page-not-present async page faults are almost a perfect match for the >> hardware use of #VE (and it might even be possible to let the processor >> deliver the exceptions). > > My "async" page fault knowledge is limited, but if the desired behavior is > to reflect a fault into the guest for select EPT Violations, then yes, > enabling EPT Violation #VEs in hardware is doable. The big gotcha is that > KVM needs to set the suppress #VE bit for all EPTEs when allocating a new > MMU page, otherwise not-present faults on zero-initialized EPTEs will get > reflected. > > Attached a patch that does the prep work in the MMU. The VMX usage would be: > > kvm_mmu_set_spte_init_value(VMX_EPT_SUPPRESS_VE_BIT); > > when EPT Violation #VEs are enabled. It's 64-bit only as it uses stosq to > initialize EPTEs. 32-bit could also be supported by doing memcpy() from > a static page. The complication is that (at least according to the current ABI) we would not want #VE to kick if the guest currently has IF=0 (and possibly CPL=0). But the ABI is not set in stone, and anyway the #VE protocol is a decent one and worth using as a base for whatever PV protocol we design. Paolo