From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43767) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dksFZ-0000oQ-7x for qemu-devel@nongnu.org; Thu, 24 Aug 2017 09:32:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dksFW-0007If-19 for qemu-devel@nongnu.org; Thu, 24 Aug 2017 09:32:45 -0400 Received: from mail-qk0-x243.google.com ([2607:f8b0:400d:c09::243]:35790) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dksFV-0007Ib-SF for qemu-devel@nongnu.org; Thu, 24 Aug 2017 09:32:41 -0400 Received: by mail-qk0-x243.google.com with SMTP id l68so2216145qke.2 for ; Thu, 24 Aug 2017 06:32:41 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= References: <1503050939-227939-1-git-send-email-imammedo@redhat.com> <1503050939-227939-4-git-send-email-imammedo@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Thu, 24 Aug 2017 10:32:33 -0300 MIME-Version: 1.0 In-Reply-To: <1503050939-227939-4-git-send-email-imammedo@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH for-2.11 03/27] sparc: convert cpu features to qdev properties List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov , qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Eduardo Habkost , Artyom Tarasenko On 08/18/2017 07:08 AM, Igor Mammedov wrote: > SPARC is the last target that uses legacy way of parsing > and initializing cpu features, drop legacy approach and > convert features to properties so that SPARC could as minimum > benefit from generic cpu_generic_init(), common with > x86 +-feat parser > > PS: > the main purpose is to remove legacy way of cpu creation as > a blocker for unifying cpu creation code across targets. > > Signed-off-by: Igor Mammedov Tested-by: Philippe Mathieu-Daudé > --- > CC: Mark Cave-Ayland > CC: Artyom Tarasenko > CC: Eduardo Habkost > --- > target/sparc/cpu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 66 insertions(+) > > diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c > index f4e7343..e735d73 100644 > --- a/target/sparc/cpu.c > +++ b/target/sparc/cpu.c > @@ -22,6 +22,8 @@ > #include "cpu.h" > #include "qemu/error-report.h" > #include "exec/exec-all.h" > +#include "hw/qdev-properties.h" > +#include "qapi/visitor.h" > > //#define DEBUG_FEATURES > > @@ -853,6 +855,69 @@ static void sparc_cpu_initfn(Object *obj) > } > } > > +static void sparc_get_nwindows(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + SPARCCPU *cpu = SPARC_CPU(obj); > + int64_t value = cpu->env.def.nwindows; > + > + visit_type_int(v, name, &value, errp); > +} > + > +static void sparc_set_nwindows(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + const int64_t min = MIN_NWINDOWS; > + const int64_t max = MAX_NWINDOWS; > + SPARCCPU *cpu = SPARC_CPU(obj); > + Error *err = NULL; > + int64_t value; > + > + visit_type_int(v, name, &value, &err); > + if (err) { > + error_propagate(errp, err); > + return; > + } > + > + if (value < min || value > max) { > + error_setg(errp, "Property %s.%s doesn't take value %" PRId64 > + " (minimum: %" PRId64 ", maximum: %" PRId64 ")", > + object_get_typename(obj), name ? name : "null", > + value, min, max); > + return; > + } > + cpu->env.def.nwindows = value; > +} > + > +static PropertyInfo qdev_prop_nwindows = { > + .name = "int", > + .get = sparc_get_nwindows, > + .set = sparc_set_nwindows, > +}; > + > +static Property sparc_cpu_properties[] = { > + DEFINE_PROP_BIT("float", SPARCCPU, env.def.features, 0, false), > + DEFINE_PROP_BIT("float128", SPARCCPU, env.def.features, 1, false), > + DEFINE_PROP_BIT("swap", SPARCCPU, env.def.features, 2, false), > + DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features, 3, false), > + DEFINE_PROP_BIT("div", SPARCCPU, env.def.features, 4, false), > + DEFINE_PROP_BIT("flush", SPARCCPU, env.def.features, 5, false), > + DEFINE_PROP_BIT("fsqrt", SPARCCPU, env.def.features, 6, false), > + DEFINE_PROP_BIT("fmul", SPARCCPU, env.def.features, 7, false), > + DEFINE_PROP_BIT("vis1", SPARCCPU, env.def.features, 8, false), > + DEFINE_PROP_BIT("vis2", SPARCCPU, env.def.features, 9, false), > + DEFINE_PROP_BIT("fsmuld", SPARCCPU, env.def.features, 10, false), > + DEFINE_PROP_BIT("hypv", SPARCCPU, env.def.features, 11, false), > + DEFINE_PROP_BIT("cmt", SPARCCPU, env.def.features, 12, false), > + DEFINE_PROP_BIT("gl", SPARCCPU, env.def.features, 13, false), > + DEFINE_PROP_UNSIGNED("iu-version", SPARCCPU, env.def.iu_version, 0, > + qdev_prop_uint64, target_ulong), > + DEFINE_PROP_UINT32("fpu-version", SPARCCPU, env.def.fpu_version, 0), > + DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0), > + { .name = "nwindows", .info = &qdev_prop_nwindows }, > + DEFINE_PROP_END_OF_LIST() > +}; > + > static void sparc_cpu_class_init(ObjectClass *oc, void *data) > { > SPARCCPUClass *scc = SPARC_CPU_CLASS(oc); > @@ -861,6 +926,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) > > scc->parent_realize = dc->realize; > dc->realize = sparc_cpu_realizefn; > + dc->props = sparc_cpu_properties; > > scc->parent_reset = cc->reset; > cc->reset = sparc_cpu_reset; >