From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752043AbdEDHEB (ORCPT ); Thu, 4 May 2017 03:04:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49360 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751344AbdEDHDx (ORCPT ); Thu, 4 May 2017 03:03:53 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E8C8C7AE95 Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=pbonzini@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com E8C8C7AE95 Subject: Re: [PATCH 3/3] nVMX: Advertise PML to L1 hypervisor To: Bandan Das , kvm@vger.kernel.org References: <20170503221457.18869-1-bsd@redhat.com> <20170503221457.18869-4-bsd@redhat.com> Cc: linux-kernel@vger.kernel.org From: Paolo Bonzini Message-ID: Date: Thu, 4 May 2017 09:03:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170503221457.18869-4-bsd@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Thu, 04 May 2017 07:03:53 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/05/2017 00:14, Bandan Das wrote: > Advertise the PML bit in vmcs12 but clear it out > before running L2 since we don't depend on hardware support > for PML emulation. > > Signed-off-by: Bandan Das > --- > arch/x86/kvm/vmx.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 5e5abb7..df71116 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -2763,8 +2763,11 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx) > vmx->nested.nested_vmx_ept_caps |= VMX_EPT_EXTENT_GLOBAL_BIT | > VMX_EPT_EXTENT_CONTEXT_BIT | VMX_EPT_2MB_PAGE_BIT | > VMX_EPT_1GB_PAGE_BIT; > - if (enable_ept_ad_bits) > + if (enable_ept_ad_bits) { > + vmx->nested.nested_vmx_secondary_ctls_high |= > + SECONDARY_EXEC_ENABLE_PML; > vmx->nested.nested_vmx_ept_caps |= VMX_EPT_AD_BIT; > + } > } else > vmx->nested.nested_vmx_ept_caps = 0; > > @@ -10080,6 +10083,7 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12, > if (exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) > vmcs_write64(APIC_ACCESS_ADDR, -1ull); > > + exec_control &= ~SECONDARY_EXEC_ENABLE_PML; > vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control); L0 is still using its own page modification log when running L2, so you have to clear the bit here instead: exec_control |= vmcs12->secondary_vm_exec_control; and set up PML_ADDRESS and GUEST_PML_INDEX. Though, the lack of PML_ADDRESS and GUEST_PML_INDEX initialization is a pre-existing bug. Paolo > } > >