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From: Jon Hunter <jonathanh@nvidia.com>
To: Dmitry Osipenko <digetx@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Mark Brown <broonie@kernel.org>, Takashi Iwai <tiwai@suse.com>,
	Jaroslav Kysela <perex@perex.cz>, Ion Agorria <ion@agorria.com>,
	Svyatoslav Ryhel <clamor95@gmail.com>,
	Liam Girdwood <lgirdwood@gmail.com>
Cc: <alsa-devel@alsa-project.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 2/2] ASoC: tegra: Unify ASoC machine drivers
Date: Mon, 24 May 2021 19:50:18 +0100	[thread overview]
Message-ID: <cf2ee04e-d4cf-14ba-92d0-aa113eb7b8c8@nvidia.com> (raw)
In-Reply-To: <f9631faa-5fc8-ecdd-709b-93b58e45a1ac@gmail.com>


On 24/05/2021 14:40, Dmitry Osipenko wrote:
> 24.05.2021 15:22, Jon Hunter пишет:
>>
>>
>> On 21/05/2021 20:05, Dmitry Osipenko wrote:
>>
>> ...
>>
>>>>> +unsigned int tegra_asoc_machine_mclk_rate(unsigned int srate)
>>>>> +{
>>>>> +	unsigned int mclk;
>>>>> +
>>>>> +	switch (srate) {
>>>>> +	case 64000:
>>>>> +	case 88200:
>>>>> +	case 96000:
>>>>> +		mclk = 128 * srate;
>>>>> +		break;
>>>>> +	default:
>>>>> +		mclk = 256 * srate;
>>>>> +		break;
>>>>> +	}
>>>>> +	/* FIXME: Codec only requires >= 3MHz if OSR==0 */
>>>>> +	while (mclk < 6000000)
>>>>> +		mclk *= 2;
>>>>
>>>> So this appears to be specific to the wm8903 codec or at least this is
>>>> where it came from. And given that the switch statement is not complete
>>>> in terms of the sample rates (ie. only has a subset), I am wondering if
>>>> set should keep this specific to the wm8903 codec?
>>>
>>> The RT5631 codec of Asus Transformers will re-use this function.
>>
>> OK, but does it need this FIXME part? That appears to be codec specific.
> 
> Downstream RT5631 Tegra driver has exactly the same FIXME.

What downstream branch are you referring to? I still don't think that
that is a good reason to make this 'FIXME' the standard going forward
and hence I would prefer that it is kept specific the wm8903. Otherwise
people will keep using this code without understanding if this is
needed/correct.

> Although, I now see that downstream RT5631 uses 384*srate for the
> default cases.
> 
> I also see that WM8994 driver that we have in grate-kernel for Galaxy
> Tab and SGH-I927 also re-uses that mclk_rate function.
> 
>>> IIUC, the default switch-case works properly for all rates below 64KHz,
>>> at least I haven't had any problems with it. Could you please clarify
>>> why you are saying that the switch statement appears to be incomplete?
>>
>> It looks a bit weird because less than 64kHz and greater than 96kHz we
>> use 256 and for only 64kHz, 88.2kHz and 96kHz we use 128. So it is not
>> clear to me which sample rates have actually been tested with this and
>> if this is complete or not?
>>
>> Is it intended that we use 256 for sample rates greater than 96kHz?
> 
> The 128*srate gives MCLK >6MHZ for 64/88/96, 256*srate gives MCLK >6MHZ
> for rates below 64kHZ. Looks like the goal is to get MCLK >6MHZ.

The wm8903 supports 8kHz sample rates and 256*8000 is less than 6MHz.
Yes the FIXME loop corrects this, but you could also extend the case
statement to multiply by 512 for 8kHz.

>  The WM8903 datasheet says:
> 
> "The  following  operating  frequency  limits  must  be  observed  when
>  configuring  CLK_SYS.  Failure  to  observe   these   limits   will
> result   in   degraded  noise   performance   and/or   incorrect
> ADC/DAC  functionality.
> 
> If DAC_OSR = 0 then CLK_SYS  3MHz
> If DAC_OSR = 1 then CLK_SYS  6MHz"
> 
> Where DAC_OSR is DAC Oversampling Control
> 0 = Low power (normal oversample)
> 1 = High performance (double rate)
> 
> I see that DAC_OSR=0 by default, it can be switched to 1 by userspace
> ALSA control.
> 

Yes that is all fine, but again this is specific to the wm8903.

Jon

-- 
nvpublic

WARNING: multiple messages have this Message-ID
From: Jon Hunter <jonathanh@nvidia.com>
To: Dmitry Osipenko <digetx@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Mark Brown <broonie@kernel.org>, Takashi Iwai <tiwai@suse.com>,
	Jaroslav Kysela <perex@perex.cz>, Ion Agorria <ion@agorria.com>,
	Svyatoslav Ryhel <clamor95@gmail.com>,
	Liam Girdwood <lgirdwood@gmail.com>
Cc: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] ASoC: tegra: Unify ASoC machine drivers
Date: Mon, 24 May 2021 19:50:18 +0100	[thread overview]
Message-ID: <cf2ee04e-d4cf-14ba-92d0-aa113eb7b8c8@nvidia.com> (raw)
In-Reply-To: <f9631faa-5fc8-ecdd-709b-93b58e45a1ac@gmail.com>


On 24/05/2021 14:40, Dmitry Osipenko wrote:
> 24.05.2021 15:22, Jon Hunter пишет:
>>
>>
>> On 21/05/2021 20:05, Dmitry Osipenko wrote:
>>
>> ...
>>
>>>>> +unsigned int tegra_asoc_machine_mclk_rate(unsigned int srate)
>>>>> +{
>>>>> +	unsigned int mclk;
>>>>> +
>>>>> +	switch (srate) {
>>>>> +	case 64000:
>>>>> +	case 88200:
>>>>> +	case 96000:
>>>>> +		mclk = 128 * srate;
>>>>> +		break;
>>>>> +	default:
>>>>> +		mclk = 256 * srate;
>>>>> +		break;
>>>>> +	}
>>>>> +	/* FIXME: Codec only requires >= 3MHz if OSR==0 */
>>>>> +	while (mclk < 6000000)
>>>>> +		mclk *= 2;
>>>>
>>>> So this appears to be specific to the wm8903 codec or at least this is
>>>> where it came from. And given that the switch statement is not complete
>>>> in terms of the sample rates (ie. only has a subset), I am wondering if
>>>> set should keep this specific to the wm8903 codec?
>>>
>>> The RT5631 codec of Asus Transformers will re-use this function.
>>
>> OK, but does it need this FIXME part? That appears to be codec specific.
> 
> Downstream RT5631 Tegra driver has exactly the same FIXME.

What downstream branch are you referring to? I still don't think that
that is a good reason to make this 'FIXME' the standard going forward
and hence I would prefer that it is kept specific the wm8903. Otherwise
people will keep using this code without understanding if this is
needed/correct.

> Although, I now see that downstream RT5631 uses 384*srate for the
> default cases.
> 
> I also see that WM8994 driver that we have in grate-kernel for Galaxy
> Tab and SGH-I927 also re-uses that mclk_rate function.
> 
>>> IIUC, the default switch-case works properly for all rates below 64KHz,
>>> at least I haven't had any problems with it. Could you please clarify
>>> why you are saying that the switch statement appears to be incomplete?
>>
>> It looks a bit weird because less than 64kHz and greater than 96kHz we
>> use 256 and for only 64kHz, 88.2kHz and 96kHz we use 128. So it is not
>> clear to me which sample rates have actually been tested with this and
>> if this is complete or not?
>>
>> Is it intended that we use 256 for sample rates greater than 96kHz?
> 
> The 128*srate gives MCLK >6MHZ for 64/88/96, 256*srate gives MCLK >6MHZ
> for rates below 64kHZ. Looks like the goal is to get MCLK >6MHZ.

The wm8903 supports 8kHz sample rates and 256*8000 is less than 6MHz.
Yes the FIXME loop corrects this, but you could also extend the case
statement to multiply by 512 for 8kHz.

>  The WM8903 datasheet says:
> 
> "The  following  operating  frequency  limits  must  be  observed  when
>  configuring  CLK_SYS.  Failure  to  observe   these   limits   will
> result   in   degraded  noise   performance   and/or   incorrect
> ADC/DAC  functionality.
> 
> If DAC_OSR = 0 then CLK_SYS  3MHz
> If DAC_OSR = 1 then CLK_SYS  6MHz"
> 
> Where DAC_OSR is DAC Oversampling Control
> 0 = Low power (normal oversample)
> 1 = High performance (double rate)
> 
> I see that DAC_OSR=0 by default, it can be switched to 1 by userspace
> ALSA control.
> 

Yes that is all fine, but again this is specific to the wm8903.

Jon

-- 
nvpublic

  reply	other threads:[~2021-05-24 18:50 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-20 17:50 [PATCH v2 0/2] Unify NVIDIA Tegra " Dmitry Osipenko
2021-05-20 17:50 ` Dmitry Osipenko
2021-05-20 17:50 ` [PATCH v2 1/2] ASoC: tegra: Set driver_name=tegra for all " Dmitry Osipenko
2021-05-20 17:50   ` Dmitry Osipenko
2021-05-20 18:12   ` Dmitry Osipenko
2021-05-20 18:12     ` Dmitry Osipenko
2021-05-20 17:50 ` [PATCH v2 2/2] ASoC: tegra: Unify ASoC " Dmitry Osipenko
2021-05-20 17:50   ` Dmitry Osipenko
2021-05-20 19:02   ` Jaroslav Kysela
2021-05-20 19:02     ` Jaroslav Kysela
2021-05-20 19:08     ` Mark Brown
2021-05-20 19:08       ` Mark Brown
2021-05-21  8:54       ` Jaroslav Kysela
2021-05-21  8:54         ` Jaroslav Kysela
2021-05-21 18:43     ` Dmitry Osipenko
2021-05-21 18:43       ` Dmitry Osipenko
2021-05-21 13:12   ` Jon Hunter
2021-05-21 13:12     ` Jon Hunter
2021-05-21 19:05     ` Dmitry Osipenko
2021-05-21 19:05       ` Dmitry Osipenko
2021-05-24 12:22       ` Jon Hunter
2021-05-24 12:22         ` Jon Hunter
2021-05-24 13:40         ` Dmitry Osipenko
2021-05-24 13:40           ` Dmitry Osipenko
2021-05-24 18:50           ` Jon Hunter [this message]
2021-05-24 18:50             ` Jon Hunter
2021-05-24 21:02             ` Dmitry Osipenko
2021-05-24 21:02               ` Dmitry Osipenko
2021-05-25  6:51               ` Jon Hunter
2021-05-25  6:51                 ` Jon Hunter

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