From: Alistair Francis <alistair.francis@xilinx.com>
To: qemu-devel@nongnu.org, edgar.iglesias@xilinx.com,
edgar.iglesias@gmail.com
Cc: alistair.francis@xilinx.com, alistair23@gmail.com, qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v3 0/8] Add the ZynqMP PMU and IPI
Date: Wed, 20 Sep 2017 15:01:31 -0700 [thread overview]
Message-ID: <cover.1505929556.git.alistair.francis@xilinx.com> (raw)
This series adds the ZynqMP Power Management Unit (PMU) machine with basic
functionality.
The machine only has the
- CPU
- Memory
- Interrupt controller
- IPI device
connected, but that is enough to run some of the ROM and firmware
code on the machine
The series also adds the IPI device and connects it to the ZynqMP ARM
side and the ZynqMP PMU. These IPI devices don't connect between the ARM
and MicroBlaze instances though.
v3:
- Add the interrupt controller
- Replace some of the error_fatals with errp
- Fix the PMU CPU name
Alistair Francis (8):
xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU
xlnx-zynqmp-pmu: Add the CPU and memory
aarch64-softmmu.mak: Use an ARM specific config
xlnx-pmu-iomod-intc: Add the PMU Interrupt controller
xlnx-zynqmp-pmu: Connect the PMU interrupt controller
xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device
xlnx-zynqmp-pmu: Connect the IPI device to the PMU
xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC
default-configs/aarch64-softmmu.mak | 1 +
default-configs/microblaze-softmmu.mak | 1 +
hw/arm/Makefile.objs | 2 +-
hw/arm/xlnx-zynqmp.c | 14 +
hw/display/Makefile.objs | 2 +-
hw/dma/Makefile.objs | 2 +-
hw/intc/Makefile.objs | 2 +
hw/intc/xlnx-pmu-iomod-intc.c | 554 +++++++++++++++++++++++++++++++++
hw/intc/xlnx-zynqmp-ipi.c | 377 ++++++++++++++++++++++
hw/microblaze/Makefile.objs | 1 +
hw/microblaze/xlnx-zynqmp-pmu.c | 200 ++++++++++++
include/hw/arm/xlnx-zynqmp.h | 2 +
include/hw/intc/xlnx-pmu-iomod-intc.h | 58 ++++
include/hw/intc/xlnx-zynqmp-ipi.h | 57 ++++
14 files changed, 1270 insertions(+), 3 deletions(-)
create mode 100644 hw/intc/xlnx-pmu-iomod-intc.c
create mode 100644 hw/intc/xlnx-zynqmp-ipi.c
create mode 100644 hw/microblaze/xlnx-zynqmp-pmu.c
create mode 100644 include/hw/intc/xlnx-pmu-iomod-intc.h
create mode 100644 include/hw/intc/xlnx-zynqmp-ipi.h
--
2.11.0
next reply other threads:[~2017-09-20 22:05 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-20 22:01 Alistair Francis [this message]
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 1/8] xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 2/8] xlnx-zynqmp-pmu: Add the CPU and memory Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 3/8] aarch64-softmmu.mak: Use an ARM specific config Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 4/8] xlnx-pmu-iomod-intc: Add the PMU Interrupt controller Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 6/8] xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 7/8] xlnx-zynqmp-pmu: Connect the IPI device to the PMU Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 8/8] xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC Alistair Francis
2017-10-08 22:20 ` [Qemu-devel] [PATCH v3 0/8] Add the ZynqMP PMU and IPI Edgar E. Iglesias
2017-10-10 0:12 ` Alistair Francis
2017-10-10 14:48 ` Edgar E. Iglesias
2017-10-10 17:59 ` Alistair Francis
2017-10-12 18:58 ` Edgar E. Iglesias
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