From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 02 Aug 2018 11:52:47 -0000 Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1flC9s-0004im-Ed for speck@linutronix.de; Thu, 02 Aug 2018 13:52:45 +0200 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id E056EAECE for ; Thu, 2 Aug 2018 11:52:37 +0000 (UTC) Message-Id: From: Nicolai Stange Date: Thu, 2 Aug 2018 13:34:07 +0200 Subject: [MODERATED] [PATCH v3 0/8] kvm: handle host mode irqs 0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 To: speck@linutronix.de List-ID: Changes to v2: -------------- - [5/8] ("x86/KVM/VMX: introduce per-host-cpu analogue of ->l1tf_flush_l1d"): use 'unsigned char' in place of former 'bool' for ->kvm_cpu_l1tf_flush_l1d (Peter Ziljstra). Update kvm_{set,clear}_cpu_l1tf_flush_l1d() to write '1' resp. '0' instead of true and false. I retained Paolo's Reviewed-by from v2 because this change looks innocent enough. Changes to v1 (the initial RFC series): --------------------------------------- turn the kernel_mode_irq_gen per-cpu counter into a latch flag (Paolo Bonzini). Group it into irq_cpustat_t for cache locality (Peter Zijlstra). Set it from C rather than asm entry code (Andi Kleen). Details - [1-3/8]: unchanged - [4/8] ("x86/irq: demote irq_cpustat_t's ->__softirq_pending to u16"): new, prerequisite for [5/8]. - [5/8] ("x86/KVM/VMX: introduce per-host-cpu analogue of ->l1tf_flush_l1d"): roughly corresponds to former [5/6] ("x86/KVM/VMX: flush L1d upon interrupt after VMEXIT"). Introduce the new latch flag rather than taking that kernel_mode_irq_gen snapshot. - [6/8] ("x86: don't include linux/irq.h from asm/hardirq.h"): new, prerequisite for [7/8]. I tested ARCH=i386 and ARCH=x86_64 allmodconfig compilations. (For i386 I had to disable CONFIG_BPFILTER_UMH because of a cross compilation issue.) - [7/8] ("x86: let interrupt handlers set kvm_cpu_l1tf_flush_l1d"): roughly corresponds to former [4/6] ("x86: implement kernel mode irq tracking"). Replace that kernel_mode_irq_gen increment from entry code by setting the new latch flag from entering_irq() & Co. - [8/8] ("x86/KVM/VMX: don't set ->l1tf_flush_l1d from vmx_handle_external_intr()"): this is the original [6/6] with its changelog slightly adjusted. Nicolai Stange (8): x86/KVM/VMX: don't set ->l1tf_flush_l1d to true from vmx_l1d_flush() x86/KVM/VMX: replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond' x86/KVM/VMX: move the ->l1tf_flush_l1d test to vmx_l1d_flush() x86/irq: demote irq_cpustat_t's ->__softirq_pending to u16 x86/KVM/VMX: introduce per-host-cpu analogue of ->l1tf_flush_l1d x86: don't include linux/irq.h from asm/hardirq.h x86: let interrupt handlers set kvm_cpu_l1tf_flush_l1d x86/KVM/VMX: don't set ->l1tf_flush_l1d from vmx_handle_external_intr() arch/x86/include/asm/apic.h | 3 ++ arch/x86/include/asm/dmi.h | 2 +- arch/x86/include/asm/hardirq.h | 27 ++++++++++++-- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kernel/apic/apic.c | 1 + arch/x86/kernel/apic/io_apic.c | 1 + arch/x86/kernel/apic/msi.c | 1 + arch/x86/kernel/apic/vector.c | 1 + arch/x86/kernel/fpu/core.c | 1 + arch/x86/kernel/hpet.c | 1 + arch/x86/kernel/i8259.c | 1 + arch/x86/kernel/idt.c | 1 + arch/x86/kernel/irq.c | 1 + arch/x86/kernel/irq_32.c | 1 + arch/x86/kernel/irq_64.c | 1 + arch/x86/kernel/irqinit.c | 1 + arch/x86/kernel/smp.c | 1 + arch/x86/kernel/smpboot.c | 1 + arch/x86/kernel/time.c | 1 + arch/x86/kvm/vmx.c | 42 +++++++++++++--------- arch/x86/mm/pti.c | 1 + .../intel-mid/device_libs/platform_mrfld_wdt.c | 1 + arch/x86/platform/uv/tlb_uv.c | 1 + arch/x86/xen/enlighten.c | 1 + drivers/gpu/drm/i915/i915_pmu.c | 1 + drivers/gpu/drm/i915/intel_lpe_audio.c | 1 + drivers/pci/controller/pci-hyperv.c | 1 + 27 files changed, 78 insertions(+), 19 deletions(-) -- 2.13.7