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From: Zong Li <zong.li@sifive.com>
To: palmer@dabbelt.com, Alistair.Francis@wdc.com, bmeng.cn@gmail.com,
	sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: Zong Li <zong.li@sifive.com>
Subject: [PATCH v2 0/2] Fix some PMP implementation
Date: Tue, 21 Jul 2020 14:03:26 +0800	[thread overview]
Message-ID: <cover.1595311277.git.zong.li@sifive.com> (raw)

This patch set contains the fixes for wrong index of pmpcfg CSR on rv64,
and the pmp range in CSR function table.

Changed in v2:
 - Move out the shifting operation from loop. Suggested by Bin Meng.

Zong Li (2):
  target/riscv: Fix the range of pmpcfg of CSR funcion table
  target/riscv/pmp.c: Fix the index offset on RV64

 target/riscv/csr.c |  2 +-
 target/riscv/pmp.c | 19 ++++++++++++++++---
 2 files changed, 17 insertions(+), 4 deletions(-)

-- 
2.27.0



             reply	other threads:[~2020-07-21  6:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-21  6:03 Zong Li [this message]
2020-07-21  6:03 ` [PATCH v2 1/2] target/riscv: Fix the range of pmpcfg of CSR funcion table Zong Li
2020-07-21  6:03   ` Zong Li
2020-07-21  6:03 ` [PATCH v2 2/2] target/riscv/pmp.c: Fix the index offset on RV64 Zong Li
2020-07-21  6:11   ` Bin Meng
2020-07-21  6:11     ` Bin Meng

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