From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9905EC433E0 for ; Mon, 11 Jan 2021 11:47:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 48BE8224F9 for ; Mon, 11 Jan 2021 11:47:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729855AbhAKLrv (ORCPT ); Mon, 11 Jan 2021 06:47:51 -0500 Received: from guitar.tcltek.co.il ([192.115.133.116]:43407 "EHLO mx.tkos.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729795AbhAKLrv (ORCPT ); Mon, 11 Jan 2021 06:47:51 -0500 Received: from tarshish.tkos.co.il (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id DA19D44083C; Mon, 11 Jan 2021 13:47:02 +0200 (IST) From: Baruch Siach To: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Lee Jones , Linus Walleij , Bartosz Golaszewski , Rob Herring Cc: Baruch Siach , Andrew Lunn , Gregory Clement , Russell King , Sebastian Hesselbarth , Thomas Petazzoni , Chris Packham , Sascha Hauer , Ralph Sennhauser , linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v7 0/3] gpio: mvebu: Armada 8K/7K PWM support Date: Mon, 11 Jan 2021 13:46:26 +0200 Message-Id: X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This version is identical to v4 with the typo fix from v5. This series has no dependency on the fixes series that I posted separately. Tested on top of v5.11-rc2. Changes in v7: * Split the get_state fix to a separate independent fixes series Changes in v6: * Reduce rounding error in the get_state fix (RMK) Changes in v5: * Add a fix for get_state * Fix typo in patch #4 subject line * Add Rob's review tag on the binding documentation patch Changes in v4: * Remove patches that are in LinusW linux-gpio for-next and fixes * Rename the 'pwm-offset' property to 'marvell,pwm-offset' as suggested by Rob Herring The original cover letter follows (with DT property name updated). The gpio-mvebu driver supports the PWM functionality of the GPIO block for earlier Armada variants like XP, 370 and 38x. This series extends support to newer Armada variants that use CP11x and AP80x, like Armada 8K and 7K. This series adds adds the 'marvell,pwm-offset' property to DT binding. 'marvell,pwm-offset' points to the base of A/B counter registers that determine the PWM period and duty cycle. The existing PWM DT binding reflects an arbitrary decision to allocate the A counter to the first GPIO block, and B counter to the other one. In attempt to provide better future flexibility, the new 'marvell,pwm-offset' property always points to the base address of both A/B counters. The driver code still allocates the counters in the same way, but this might change in the future with no change to the DT. Tested AP806 and CP110 (both) on Armada 8040 based system. Baruch Siach (3): gpio: mvebu: add pwm support for Armada 8K/7K arm64: dts: armada: add pwm offsets for ap/cp gpios dt-bindings: ap806: document gpio marvell,pwm-offset property .../arm/marvell/ap80x-system-controller.txt | 8 ++ arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 3 + arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++ drivers/gpio/gpio-mvebu.c | 101 ++++++++++++------ 4 files changed, 89 insertions(+), 33 deletions(-) -- 2.29.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62C91C433E0 for ; Mon, 11 Jan 2021 11:48:42 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E7E5820729 for ; Mon, 11 Jan 2021 11:48:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E7E5820729 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=tkos.co.il Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=PulKzfaVJPYqkvad6xGK+uPCKL5Jv+TcU+ToL7h2IW4=; b=KY0vW4rFq1qHsvCS6u5mCujhNo uBG30zpNOuVJH88jHDWVXFk/Ovy8/DZRRif98gxyKqZPd4sVvBwGAWijXbXrP/KstJqahrTFWod+t godkKkvgkCoQu8e55/5zsUmEg6/Uuhn2k0lAsvJMCVCxj85o3VyOhlFpOecGSKX1A0Fy/wi+WJCTC JpjTOINUqbvsH69l1On/Q1p8hdu6vrT7PMqc/eltxNEwAW1ZraelYTmzADg/Sz1Ve17R7jt1OMsV1 yIaGLVfnvbSzw6KIUWFYYeiy9/clAGVCwtHOEDmMI8wktx4z9vi3cOLLPWVmCZDHKAqzeSxQTNkIq 1u175Imw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kyvfD-0004ob-CZ; Mon, 11 Jan 2021 11:47:11 +0000 Received: from guitar.tcltek.co.il ([192.115.133.116] helo=mx.tkos.co.il) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kyvfA-0004ne-Qj for linux-arm-kernel@lists.infradead.org; Mon, 11 Jan 2021 11:47:10 +0000 Received: from tarshish.tkos.co.il (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id DA19D44083C; Mon, 11 Jan 2021 13:47:02 +0200 (IST) From: Baruch Siach To: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Lee Jones , Linus Walleij , Bartosz Golaszewski , Rob Herring Subject: [PATCH v7 0/3] gpio: mvebu: Armada 8K/7K PWM support Date: Mon, 11 Jan 2021 13:46:26 +0200 Message-Id: X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210111_064709_395694_50516412 X-CRM114-Status: GOOD ( 17.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Baruch Siach , linux-pwm@vger.kernel.org, Gregory Clement , Russell King , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Chris Packham , Thomas Petazzoni , Ralph Sennhauser , Sascha Hauer , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This version is identical to v4 with the typo fix from v5. This series has no dependency on the fixes series that I posted separately. Tested on top of v5.11-rc2. Changes in v7: * Split the get_state fix to a separate independent fixes series Changes in v6: * Reduce rounding error in the get_state fix (RMK) Changes in v5: * Add a fix for get_state * Fix typo in patch #4 subject line * Add Rob's review tag on the binding documentation patch Changes in v4: * Remove patches that are in LinusW linux-gpio for-next and fixes * Rename the 'pwm-offset' property to 'marvell,pwm-offset' as suggested by Rob Herring The original cover letter follows (with DT property name updated). The gpio-mvebu driver supports the PWM functionality of the GPIO block for earlier Armada variants like XP, 370 and 38x. This series extends support to newer Armada variants that use CP11x and AP80x, like Armada 8K and 7K. This series adds adds the 'marvell,pwm-offset' property to DT binding. 'marvell,pwm-offset' points to the base of A/B counter registers that determine the PWM period and duty cycle. The existing PWM DT binding reflects an arbitrary decision to allocate the A counter to the first GPIO block, and B counter to the other one. In attempt to provide better future flexibility, the new 'marvell,pwm-offset' property always points to the base address of both A/B counters. The driver code still allocates the counters in the same way, but this might change in the future with no change to the DT. Tested AP806 and CP110 (both) on Armada 8040 based system. Baruch Siach (3): gpio: mvebu: add pwm support for Armada 8K/7K arm64: dts: armada: add pwm offsets for ap/cp gpios dt-bindings: ap806: document gpio marvell,pwm-offset property .../arm/marvell/ap80x-system-controller.txt | 8 ++ arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 3 + arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++ drivers/gpio/gpio-mvebu.c | 101 ++++++++++++------ 4 files changed, 89 insertions(+), 33 deletions(-) -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel