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* [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A
@ 2021-06-02 17:08 Grzegorz Szymaszek
  2021-06-02 17:08 ` [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties Grzegorz Szymaszek
                   ` (4 more replies)
  0 siblings, 5 replies; 15+ messages in thread
From: Grzegorz Szymaszek @ 2021-06-02 17:08 UTC (permalink / raw)
  To: u-boot
  Cc: Grzegorz Szymaszek, Marcin Sloniewski, Patrice Chotard,
	Patrick Delaunay, uboot-stm32

This patchset updates the properties of the SDMMC2 device tree node so
that they match their Linux kernel and Trusted Firmware A counterparts.
Two differences will remain:
— in the Linux kernel device tree, the VQMMC supply is incorrectly set
  to v3v3 (buck4) instead of vdd (buck3);
— in the TF‑A device tree, only the “default” pinctrl is configured.

Additionally, this patchset enables SDMMC2 in SPL.

Changes for v2:
— rebased on current master (no code changes);
— added Patrice Chotard’s Reviewed-by (thanks!);
— added missing commit message bodies.

Grzegorz Szymaszek (5):
  arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
  arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
  arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
  arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL

 .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++++++++++++++++++
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi     | 15 +++++++------
 2 files changed, 30 insertions(+), 6 deletions(-)

-- 
2.30.2


^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
  2021-06-02 17:08 [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A Grzegorz Szymaszek
@ 2021-06-02 17:08 ` Grzegorz Szymaszek
  2021-06-18  7:59   ` Patrice CHOTARD
  2021-06-02 17:09 ` [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes Grzegorz Szymaszek
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 15+ messages in thread
From: Grzegorz Szymaszek @ 2021-06-02 17:08 UTC (permalink / raw)
  To: u-boot
  Cc: Grzegorz Szymaszek, Marcin Sloniewski, Patrice Chotard,
	Patrick Delaunay, uboot-stm32

The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
Changes for v2:
   - rebased on current master (patch not changed)
   - added Patrice Chotard’s Reviewed-by

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index e367a311c4..ed399c00d1 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -267,8 +267,9 @@
 	pinctrl-0 = <&sdmmc2_b4_pins_a>;
 	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
 	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
-	broken-cd;
-	disable-wp;
+	non-removable;
+	no-sd;
+	no-sdio;
 	st,neg-edge;
 	bus-width = <4>;
 	vmmc-supply = <&v3v3>;
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
  2021-06-02 17:08 [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A Grzegorz Szymaszek
  2021-06-02 17:08 ` [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties Grzegorz Szymaszek
@ 2021-06-02 17:09 ` Grzegorz Szymaszek
  2021-06-18  7:59   ` Patrice CHOTARD
  2021-06-02 17:09 ` [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply Grzegorz Szymaszek
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 15+ messages in thread
From: Grzegorz Szymaszek @ 2021-06-02 17:09 UTC (permalink / raw)
  To: u-boot
  Cc: Grzegorz Szymaszek, Marcin Sloniewski, Patrice Chotard,
	Patrick Delaunay, uboot-stm32

Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
bus width from four to eight.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
Changes for v2:
   - rebased on current master (patch not changed)
   - added Patrice Chotard’s Reviewed-by

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index ed399c00d1..7323325e60 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -264,14 +264,14 @@
 
 &sdmmc2 {
 	pinctrl-names = "default", "opendrain", "sleep";
-	pinctrl-0 = <&sdmmc2_b4_pins_a>;
-	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
-	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
+	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_d>;
+	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_d>;
+	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_d>;
 	non-removable;
 	no-sd;
 	no-sdio;
 	st,neg-edge;
-	bus-width = <4>;
+	bus-width = <8>;
 	vmmc-supply = <&v3v3>;
 	status = "okay";
 };
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
  2021-06-02 17:08 [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A Grzegorz Szymaszek
  2021-06-02 17:08 ` [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties Grzegorz Szymaszek
  2021-06-02 17:09 ` [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes Grzegorz Szymaszek
@ 2021-06-02 17:09 ` Grzegorz Szymaszek
  2021-06-18  7:59   ` Patrice CHOTARD
  2021-06-02 17:09 ` [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode Grzegorz Szymaszek
  2021-06-02 17:09 ` [PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL Grzegorz Szymaszek
  4 siblings, 1 reply; 15+ messages in thread
From: Grzegorz Szymaszek @ 2021-06-02 17:09 UTC (permalink / raw)
  To: u-boot
  Cc: Grzegorz Szymaszek, Marcin Sloniewski, Patrice Chotard,
	Patrick Delaunay, uboot-stm32

Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
corresponding Linux kernel device tree, the supply is set to v3v3
(buck4), which is wrong.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
Changes for v2:
   - rebased on current master (patch not changed)
   - added Patrice Chotard’s Reviewed-by

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 7323325e60..583812f137 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -273,6 +273,7 @@
 	st,neg-edge;
 	bus-width = <8>;
 	vmmc-supply = <&v3v3>;
+	vqmmc-supply = <&vdd>;
 	status = "okay";
 };
 
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  2021-06-02 17:08 [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A Grzegorz Szymaszek
                   ` (2 preceding siblings ...)
  2021-06-02 17:09 ` [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply Grzegorz Szymaszek
@ 2021-06-02 17:09 ` Grzegorz Szymaszek
  2021-06-03  7:35   ` Patrice CHOTARD
  2021-06-02 17:09 ` [PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL Grzegorz Szymaszek
  4 siblings, 1 reply; 15+ messages in thread
From: Grzegorz Szymaszek @ 2021-06-02 17:09 UTC (permalink / raw)
  To: u-boot
  Cc: Grzegorz Szymaszek, Marcin Sloniewski, Patrice Chotard,
	Patrick Delaunay, uboot-stm32

Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
---
Changes for v2:
   - rebased on current master
   - added a short commit message body

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 583812f137..1510a5b364 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -274,6 +274,7 @@
 	bus-width = <8>;
 	vmmc-supply = <&v3v3>;
 	vqmmc-supply = <&vdd>;
+	mmc-ddr-3_3v;
 	status = "okay";
 };
 
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL
  2021-06-02 17:08 [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A Grzegorz Szymaszek
                   ` (3 preceding siblings ...)
  2021-06-02 17:09 ` [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode Grzegorz Szymaszek
@ 2021-06-02 17:09 ` Grzegorz Szymaszek
  2021-06-03  7:36   ` Patrice CHOTARD
  4 siblings, 1 reply; 15+ messages in thread
From: Grzegorz Szymaszek @ 2021-06-02 17:09 UTC (permalink / raw)
  To: u-boot
  Cc: Grzegorz Szymaszek, Marcin Sloniewski, Patrice Chotard,
	Patrick Delaunay, uboot-stm32

Enable the SDMMC2 device tree node, as well as the pins it uses, in
U-Boot SPL.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
---
Changes for v2:
   - rebased on current master
   - added a short commit message body

 .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
index 6be728846e..4ff848350d 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
@@ -123,3 +123,24 @@
 		u-boot,dm-pre-reloc;
 	};
 };
+
+&sdmmc2 {
+	u-boot,dm-spl;
+};
+
+&sdmmc2_b4_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc2_d47_pins_d {
+	u-boot,dm-spl;
+	pins {
+		u-boot,dm-spl;
+	};
+};
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  2021-06-02 17:09 ` [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode Grzegorz Szymaszek
@ 2021-06-03  7:35   ` Patrice CHOTARD
  2021-06-18  8:00     ` [Uboot-stm32] " Patrice CHOTARD
  2021-06-18  8:00     ` Patrice CHOTARD
  0 siblings, 2 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-03  7:35 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32

Hi Grzegorz

On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
> corresponding Linux kernel device tree.
> 
> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> Changes for v2:
>    - rebased on current master
>    - added a short commit message body
> 
>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> index 583812f137..1510a5b364 100644
> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> @@ -274,6 +274,7 @@
>  	bus-width = <8>;
>  	vmmc-supply = <&v3v3>;
>  	vqmmc-supply = <&vdd>;
> +	mmc-ddr-3_3v;
>  	status = "okay";
>  };
>  
> 

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

Thanks
Patrice

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL
  2021-06-02 17:09 ` [PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL Grzegorz Szymaszek
@ 2021-06-03  7:36   ` Patrice CHOTARD
  0 siblings, 0 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-03  7:36 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32

Hi Grzegorz

On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
> Enable the SDMMC2 device tree node, as well as the pins it uses, in
> U-Boot SPL.
> 
> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> Changes for v2:
>    - rebased on current master
>    - added a short commit message body
> 
>  .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
> index 6be728846e..4ff848350d 100644
> --- a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
> @@ -123,3 +123,24 @@
>  		u-boot,dm-pre-reloc;
>  	};
>  };
> +
> +&sdmmc2 {
> +	u-boot,dm-spl;
> +};
> +
> +&sdmmc2_b4_pins_a {
> +	u-boot,dm-spl;
> +	pins1 {
> +		u-boot,dm-spl;
> +	};
> +	pins2 {
> +		u-boot,dm-spl;
> +	};
> +};
> +
> +&sdmmc2_d47_pins_d {
> +	u-boot,dm-spl;
> +	pins {
> +		u-boot,dm-spl;
> +	};
> +};
> 
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
  2021-06-02 17:08 ` [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties Grzegorz Szymaszek
@ 2021-06-18  7:59   ` Patrice CHOTARD
  0 siblings, 0 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  7:59 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/2/21 7:08 PM, Grzegorz Szymaszek wrote:
> The SDMMC2 interface hosts an eMMC. Replace the interface properties
> that would only apply to SD cards—“broken-cd” and “disable-wp”—with
> relevant ones: “non-removable”, “no-sd” and “no-sdio”.
> 
> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> ---
> Changes for v2:
>    - rebased on current master (patch not changed)
>    - added Patrice Chotard’s Reviewed-by
> 
>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> index e367a311c4..ed399c00d1 100644
> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> @@ -267,8 +267,9 @@
>  	pinctrl-0 = <&sdmmc2_b4_pins_a>;
>  	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
>  	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
> -	broken-cd;
> -	disable-wp;
> +	non-removable;
> +	no-sd;
> +	no-sdio;
>  	st,neg-edge;
>  	bus-width = <4>;
>  	vmmc-supply = <&v3v3>;
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
  2021-06-02 17:09 ` [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes Grzegorz Szymaszek
@ 2021-06-18  7:59   ` Patrice CHOTARD
  2021-06-18  7:59     ` Patrice CHOTARD
  0 siblings, 1 reply; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  7:59 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
> Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
> bus width from four to eight.
> 
> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> ---
> Changes for v2:
>    - rebased on current master (patch not changed)
>    - added Patrice Chotard’s Reviewed-by
> 
>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> index ed399c00d1..7323325e60 100644
> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> @@ -264,14 +264,14 @@
>  
>  &sdmmc2 {
>  	pinctrl-names = "default", "opendrain", "sleep";
> -	pinctrl-0 = <&sdmmc2_b4_pins_a>;
> -	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
> -	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
> +	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_d>;
> +	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_d>;
> +	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_d>;
>  	non-removable;
>  	no-sd;
>  	no-sdio;
>  	st,neg-edge;
> -	bus-width = <4>;
> +	bus-width = <8>;
>  	vmmc-supply = <&v3v3>;
>  	status = "okay";
>  };
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
  2021-06-18  7:59   ` Patrice CHOTARD
@ 2021-06-18  7:59     ` Patrice CHOTARD
  0 siblings, 0 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  7:59 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/18/21 9:59 AM, Patrice CHOTARD wrote:
> 
> 
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
>> bus width from four to eight.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
>> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
>> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
>> ---
>> Changes for v2:
>>    - rebased on current master (patch not changed)
>>    - added Patrice Chotard’s Reviewed-by
>>
>>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index ed399c00d1..7323325e60 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -264,14 +264,14 @@
>>  
>>  &sdmmc2 {
>>  	pinctrl-names = "default", "opendrain", "sleep";
>> -	pinctrl-0 = <&sdmmc2_b4_pins_a>;
>> -	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
>> -	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
>> +	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_d>;
>> +	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_d>;
>> +	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_d>;
>>  	non-removable;
>>  	no-sd;
>>  	no-sdio;
>>  	st,neg-edge;
>> -	bus-width = <4>;
>> +	bus-width = <8>;
>>  	vmmc-supply = <&v3v3>;
>>  	status = "okay";
>>  };
>>
> Applied on u-boot-stm32/next
> 
> Thanks
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
  2021-06-02 17:09 ` [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply Grzegorz Szymaszek
@ 2021-06-18  7:59   ` Patrice CHOTARD
  2021-06-18  8:00     ` Patrice CHOTARD
  0 siblings, 1 reply; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  7:59 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
> Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
> corresponding Linux kernel device tree, the supply is set to v3v3
> (buck4), which is wrong.
> 
> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> ---
> Changes for v2:
>    - rebased on current master (patch not changed)
>    - added Patrice Chotard’s Reviewed-by
> 
>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> index 7323325e60..583812f137 100644
> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> @@ -273,6 +273,7 @@
>  	st,neg-edge;
>  	bus-width = <8>;
>  	vmmc-supply = <&v3v3>;
> +	vqmmc-supply = <&vdd>;
>  	status = "okay";
>  };
>  
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
  2021-06-18  7:59   ` Patrice CHOTARD
@ 2021-06-18  8:00     ` Patrice CHOTARD
  0 siblings, 0 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  8:00 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/18/21 9:59 AM, Patrice CHOTARD wrote:
> 
> 
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
>> corresponding Linux kernel device tree, the supply is set to v3v3
>> (buck4), which is wrong.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
>> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
>> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
>> ---
>> Changes for v2:
>>    - rebased on current master (patch not changed)
>>    - added Patrice Chotard’s Reviewed-by
>>
>>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index 7323325e60..583812f137 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -273,6 +273,7 @@
>>  	st,neg-edge;
>>  	bus-width = <8>;
>>  	vmmc-supply = <&v3v3>;
>> +	vqmmc-supply = <&vdd>;
>>  	status = "okay";
>>  };
>>  
>>
> Applied on u-boot-stm32/next
> 
> Thanks
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [Uboot-stm32] [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  2021-06-03  7:35   ` Patrice CHOTARD
@ 2021-06-18  8:00     ` Patrice CHOTARD
  2021-06-18  8:00     ` Patrice CHOTARD
  1 sibling, 0 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  8:00 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/3/21 9:35 AM, Patrice CHOTARD wrote:
> Hi Grzegorz
> 
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
>> corresponding Linux kernel device tree.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
>> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
>> ---
>> Changes for v2:
>>    - rebased on current master
>>    - added a short commit message body
>>
>>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index 583812f137..1510a5b364 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -274,6 +274,7 @@
>>  	bus-width = <8>;
>>  	vmmc-supply = <&v3v3>;
>>  	vqmmc-supply = <&vdd>;
>> +	mmc-ddr-3_3v;
>>  	status = "okay";
>>  };
>>  
>>
> 
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> 
> Thanks
> Patrice
> _______________________________________________
> Uboot-stm32 mailing list
> Uboot-stm32@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  2021-06-03  7:35   ` Patrice CHOTARD
  2021-06-18  8:00     ` [Uboot-stm32] " Patrice CHOTARD
@ 2021-06-18  8:00     ` Patrice CHOTARD
  1 sibling, 0 replies; 15+ messages in thread
From: Patrice CHOTARD @ 2021-06-18  8:00 UTC (permalink / raw)
  To: u-boot, Marcin Sloniewski, Patrick Delaunay, uboot-stm32



On 6/3/21 9:35 AM, Patrice CHOTARD wrote:
> Hi Grzegorz
> 
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
>> corresponding Linux kernel device tree.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
>> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
>> ---
>> Changes for v2:
>>    - rebased on current master
>>    - added a short commit message body
>>
>>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index 583812f137..1510a5b364 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -274,6 +274,7 @@
>>  	bus-width = <8>;
>>  	vmmc-supply = <&v3v3>;
>>  	vqmmc-supply = <&vdd>;
>> +	mmc-ddr-3_3v;
>>  	status = "okay";
>>  };
>>  
>>
> 
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> 
> Thanks
> Patrice
> 
Applied on u-boot-stm32/next

Thanks

^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2021-06-18  8:00 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-02 17:08 [PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A Grzegorz Szymaszek
2021-06-02 17:08 ` [PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties Grzegorz Szymaszek
2021-06-18  7:59   ` Patrice CHOTARD
2021-06-02 17:09 ` [PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes Grzegorz Szymaszek
2021-06-18  7:59   ` Patrice CHOTARD
2021-06-18  7:59     ` Patrice CHOTARD
2021-06-02 17:09 ` [PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply Grzegorz Szymaszek
2021-06-18  7:59   ` Patrice CHOTARD
2021-06-18  8:00     ` Patrice CHOTARD
2021-06-02 17:09 ` [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode Grzegorz Szymaszek
2021-06-03  7:35   ` Patrice CHOTARD
2021-06-18  8:00     ` [Uboot-stm32] " Patrice CHOTARD
2021-06-18  8:00     ` Patrice CHOTARD
2021-06-02 17:09 ` [PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL Grzegorz Szymaszek
2021-06-03  7:36   ` Patrice CHOTARD

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