* [PATCH 0/6] Misc pegasos2 patches
@ 2021-10-14 19:50 BALATON Zoltan
2021-10-14 19:50 ` [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region BALATON Zoltan
` (6 more replies)
0 siblings, 7 replies; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
Some small clean ups and improvements for the pegasos2 machine.
BALATON Zoltan (6):
ppc/pegasos2: Restrict memory to 2 gigabytes
ppc/pegasos2: Warn when using VOF but no kernel is specified
ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
ppc/pegasos2: Access MV64361 registers via their memory region
ppc/pegasos2: Add constants for PCI config addresses
ppc/pegasos2: Implement power-off RTAS function with VOF
hw/pci-host/mv64361.c | 1 +
hw/ppc/pegasos2.c | 162 ++++++++++++++++++++++++++----------------
2 files changed, 101 insertions(+), 62 deletions(-)
--
2.21.4
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/6] ppc/pegasos2: Restrict memory to 2 gigabytes
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
2021-10-14 19:50 ` [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region BALATON Zoltan
@ 2021-10-14 19:50 ` BALATON Zoltan
2021-10-15 3:15 ` David Gibson
2021-10-14 19:50 ` [PATCH 5/6] ppc/pegasos2: Add constants for PCI config addresses BALATON Zoltan
` (4 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
The CHRP spec this board confirms to only allows 2 GiB of system
memory below 4 GiB as the high 2 GiB is allocated to IO and system
resources. To avoid problems with memory overlapping these areas
restrict RAM to 2 GiB similar to mac_newworld.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index b8ce859f1a..474cfdeabf 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -117,6 +117,10 @@ static void pegasos2_init(MachineState *machine)
qemu_register_reset(pegasos2_cpu_reset, pm->cpu);
/* RAM */
+ if (machine->ram_size > 2 * GiB) {
+ error_report("RAM size more than 2 GiB is not supported");
+ exit(1);
+ }
memory_region_add_subregion(get_system_memory(), 0, machine->ram);
/* allocate and load firmware */
--
2.21.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
` (2 preceding siblings ...)
2021-10-14 19:50 ` [PATCH 5/6] ppc/pegasos2: Add constants for PCI config addresses BALATON Zoltan
@ 2021-10-14 19:50 ` BALATON Zoltan
2021-10-15 3:17 ` David Gibson
2021-10-14 19:50 ` [PATCH 6/6] ppc/pegasos2: Implement power-off " BALATON Zoltan
` (2 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
This is needed for Linux to access RTC time.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index a1dd1f6752..a9e3625f56 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -31,6 +31,8 @@
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "exec/address-spaces.h"
+#include "qom/qom-qobject.h"
+#include "qapi/qmp/qdict.h"
#include "trace.h"
#include "qemu/datadir.h"
#include "sysemu/device_tree.h"
@@ -369,6 +371,29 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
return H_PARAMETER;
}
switch (token) {
+ case RTAS_GET_TIME_OF_DAY:
+ {
+ QObject *qo = object_property_get_qobject(qdev_get_machine(),
+ "rtc-time", &error_fatal);
+ QDict *qd = qobject_to(QDict, qo);
+
+ if (nargs != 0 || nrets != 8 || !qd) {
+ stl_be_phys(as, rets, -1);
+ qobject_unref(qo);
+ return H_PARAMETER;
+ }
+
+ stl_be_phys(as, rets, 0);
+ stl_be_phys(as, rets + 4, qdict_get_int(qd, "tm_year") + 1900);
+ stl_be_phys(as, rets + 8, qdict_get_int(qd, "tm_mon") + 1);
+ stl_be_phys(as, rets + 12, qdict_get_int(qd, "tm_mday"));
+ stl_be_phys(as, rets + 16, qdict_get_int(qd, "tm_hour"));
+ stl_be_phys(as, rets + 20, qdict_get_int(qd, "tm_min"));
+ stl_be_phys(as, rets + 24, qdict_get_int(qd, "tm_sec"));
+ stl_be_phys(as, rets + 28, 0);
+ qobject_unref(qo);
+ return H_SUCCESS;
+ }
case RTAS_READ_PCI_CONFIG:
{
uint32_t addr, len, val;
--
2.21.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/6] ppc/pegasos2: Add constants for PCI config addresses
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
2021-10-14 19:50 ` [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region BALATON Zoltan
2021-10-14 19:50 ` [PATCH 1/6] ppc/pegasos2: Restrict memory to 2 gigabytes BALATON Zoltan
@ 2021-10-14 19:50 ` BALATON Zoltan
2021-10-15 3:19 ` David Gibson
2021-10-14 19:50 ` [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF BALATON Zoltan
` (3 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
Define a constant for PCI config addresses to make it clearer what
these numbers are.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index a861bf16b8..39e96d323f 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -54,11 +54,13 @@
#define BUS_FREQ_HZ 133333333
+#define PCI0_CFG_ADDR 0xcf8
#define PCI0_MEM_BASE 0xc0000000
#define PCI0_MEM_SIZE 0x20000000
#define PCI0_IO_BASE 0xf8000000
#define PCI0_IO_SIZE 0x10000
+#define PCI1_CFG_ADDR 0xc78
#define PCI1_MEM_BASE 0x80000000
#define PCI1_MEM_SIZE 0x40000000
#define PCI1_IO_BASE 0xfe000000
@@ -226,7 +228,7 @@ static void pegasos2_mv_reg_write(Pegasos2MachineState *pm, uint32_t addr,
static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus,
uint32_t addr, uint32_t len)
{
- hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
+ hwaddr pcicfg = bus ? PCI1_CFG_ADDR : PCI0_CFG_ADDR;
uint64_t val = 0xffffffffULL;
if (len <= 4) {
@@ -239,7 +241,7 @@ static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus,
static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus,
uint32_t addr, uint32_t len, uint32_t val)
{
- hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
+ hwaddr pcicfg = bus ? PCI1_CFG_ADDR : PCI0_CFG_ADDR;
pegasos2_mv_reg_write(pm, pcicfg, 4, addr | BIT(31));
pegasos2_mv_reg_write(pm, pcicfg + 4, len, val);
--
2.21.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/6] ppc/pegasos2: Warn when using VOF but no kernel is specified
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
` (4 preceding siblings ...)
2021-10-14 19:50 ` [PATCH 6/6] ppc/pegasos2: Implement power-off " BALATON Zoltan
@ 2021-10-14 19:50 ` BALATON Zoltan
2021-10-15 3:15 ` David Gibson
2021-10-15 3:20 ` [PATCH 0/6] Misc pegasos2 patches David Gibson
6 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
Issue a warning when using VOF (which is the default) but no -kernel
option given to let users know that it will likely fail as the guest
has nothing to run. It is not a hard error because it may still be
useful to start the machine without further options for testing or
inspecting it from monitor without actually booting it.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 474cfdeabf..a1dd1f6752 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -194,7 +194,10 @@ static void pegasos2_init(MachineState *machine)
if (!pm->vof) {
warn_report("Option -kernel may be ineffective with -bios.");
}
+ } else if (pm->vof) {
+ warn_report("Using Virtual OpenFirmware but no -kernel option.");
}
+
if (!pm->vof && machine->kernel_cmdline && machine->kernel_cmdline[0]) {
warn_report("Option -append may be ineffective with -bios.");
}
--
2.21.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
@ 2021-10-14 19:50 ` BALATON Zoltan
2021-10-15 3:18 ` David Gibson
2021-10-14 19:50 ` [PATCH 1/6] ppc/pegasos2: Restrict memory to 2 gigabytes BALATON Zoltan
` (5 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
Instead of relying on the mapped address of the MV64361 registers
access them via their memory region. This is not a problem at reset
time when these registers are mapped at the default address but the
guest could change this later and then the RTAS calls accessing PCI
config registers could fail. None of the guests actually do this so
this only avoids a theoretical problem not seen in practice.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/pci-host/mv64361.c | 1 +
hw/ppc/pegasos2.c | 117 ++++++++++++++++++++----------------------
2 files changed, 56 insertions(+), 62 deletions(-)
diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 92b0f5d047..00b3ff7d90 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -869,6 +869,7 @@ static void mv64361_realize(DeviceState *dev, Error **errp)
s->base_addr_enable = 0x1fffff;
memory_region_init_io(&s->regs, OBJECT(s), &mv64361_ops, s,
TYPE_MV64361, 0x10000);
+ sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->regs);
for (i = 0; i < 2; i++) {
g_autofree char *name = g_strdup_printf("pcihost%d", i);
object_initialize_child(OBJECT(dev), name, &s->pci[i],
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index a9e3625f56..a861bf16b8 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -205,56 +205,49 @@ static void pegasos2_init(MachineState *machine)
}
}
-static uint32_t pegasos2_pci_config_read(AddressSpace *as, int bus,
+static uint32_t pegasos2_mv_reg_read(Pegasos2MachineState *pm,
+ uint32_t addr, uint32_t len)
+{
+ MemoryRegion *r = sysbus_mmio_get_region(SYS_BUS_DEVICE(pm->mv), 0);
+ uint64_t val = 0xffffffffULL;
+ memory_region_dispatch_read(r, addr, &val, size_memop(len) | MO_LE,
+ MEMTXATTRS_UNSPECIFIED);
+ return val;
+}
+
+static void pegasos2_mv_reg_write(Pegasos2MachineState *pm, uint32_t addr,
+ uint32_t len, uint32_t val)
+{
+ MemoryRegion *r = sysbus_mmio_get_region(SYS_BUS_DEVICE(pm->mv), 0);
+ memory_region_dispatch_write(r, addr, val, size_memop(len) | MO_LE,
+ MEMTXATTRS_UNSPECIFIED);
+}
+
+static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus,
uint32_t addr, uint32_t len)
{
- hwaddr pcicfg = (bus ? 0xf1000c78 : 0xf1000cf8);
- uint32_t val = 0xffffffff;
-
- stl_le_phys(as, pcicfg, addr | BIT(31));
- switch (len) {
- case 4:
- val = ldl_le_phys(as, pcicfg + 4);
- break;
- case 2:
- val = lduw_le_phys(as, pcicfg + 4);
- break;
- case 1:
- val = ldub_phys(as, pcicfg + 4);
- break;
- default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid length\n", __func__);
- break;
+ hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
+ uint64_t val = 0xffffffffULL;
+
+ if (len <= 4) {
+ pegasos2_mv_reg_write(pm, pcicfg, 4, addr | BIT(31));
+ val = pegasos2_mv_reg_read(pm, pcicfg + 4, len);
}
return val;
}
-static void pegasos2_pci_config_write(AddressSpace *as, int bus, uint32_t addr,
- uint32_t len, uint32_t val)
+static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus,
+ uint32_t addr, uint32_t len, uint32_t val)
{
- hwaddr pcicfg = (bus ? 0xf1000c78 : 0xf1000cf8);
-
- stl_le_phys(as, pcicfg, addr | BIT(31));
- switch (len) {
- case 4:
- stl_le_phys(as, pcicfg + 4, val);
- break;
- case 2:
- stw_le_phys(as, pcicfg + 4, val);
- break;
- case 1:
- stb_phys(as, pcicfg + 4, val);
- break;
- default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid length\n", __func__);
- break;
- }
+ hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
+
+ pegasos2_mv_reg_write(pm, pcicfg, 4, addr | BIT(31));
+ pegasos2_mv_reg_write(pm, pcicfg + 4, len, val);
}
static void pegasos2_machine_reset(MachineState *machine)
{
Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine);
- AddressSpace *as = CPU(pm->cpu)->as;
void *fdt;
uint64_t d[2];
int sz;
@@ -265,51 +258,51 @@ static void pegasos2_machine_reset(MachineState *machine)
}
/* Otherwise, set up devices that board firmware would normally do */
- stl_le_phys(as, 0xf1000000, 0x28020ff);
- stl_le_phys(as, 0xf1000278, 0xa31fc);
- stl_le_phys(as, 0xf100f300, 0x11ff0400);
- stl_le_phys(as, 0xf100f10c, 0x80000000);
- stl_le_phys(as, 0xf100001c, 0x8000000);
- pegasos2_pci_config_write(as, 0, PCI_COMMAND, 2, PCI_COMMAND_IO |
+ pegasos2_mv_reg_write(pm, 0, 4, 0x28020ff);
+ pegasos2_mv_reg_write(pm, 0x278, 4, 0xa31fc);
+ pegasos2_mv_reg_write(pm, 0xf300, 4, 0x11ff0400);
+ pegasos2_mv_reg_write(pm, 0xf10c, 4, 0x80000000);
+ pegasos2_mv_reg_write(pm, 0x1c, 4, 0x8000000);
+ pegasos2_pci_config_write(pm, 0, PCI_COMMAND, 2, PCI_COMMAND_IO |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- pegasos2_pci_config_write(as, 1, PCI_COMMAND, 2, PCI_COMMAND_IO |
+ pegasos2_pci_config_write(pm, 1, PCI_COMMAND, 2, PCI_COMMAND_IO |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 0) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
PCI_INTERRUPT_LINE, 2, 0x9);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 0) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
0x50, 1, 0x2);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
PCI_INTERRUPT_LINE, 2, 0x109);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
PCI_CLASS_PROG, 1, 0xf);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
0x40, 1, 0xb);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
0x50, 4, 0x17171717);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
PCI_COMMAND, 2, 0x87);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 2) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 2) << 8) |
PCI_INTERRUPT_LINE, 2, 0x409);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 3) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 3) << 8) |
PCI_INTERRUPT_LINE, 2, 0x409);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
PCI_INTERRUPT_LINE, 2, 0x9);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
0x48, 4, 0xf00);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
0x40, 4, 0x558020);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
0x90, 4, 0xd00);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 5) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 5) << 8) |
PCI_INTERRUPT_LINE, 2, 0x309);
- pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 6) << 8) |
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 6) << 8) |
PCI_INTERRUPT_LINE, 2, 0x309);
/* Device tree and VOF set up */
@@ -404,7 +397,7 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
}
addr = ldl_be_phys(as, args);
len = ldl_be_phys(as, args + 4);
- val = pegasos2_pci_config_read(as, !(addr >> 24),
+ val = pegasos2_pci_config_read(pm, !(addr >> 24),
addr & 0x0fffffff, len);
stl_be_phys(as, rets, 0);
stl_be_phys(as, rets + 4, val);
@@ -421,7 +414,7 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
addr = ldl_be_phys(as, args);
len = ldl_be_phys(as, args + 4);
val = ldl_be_phys(as, args + 8);
- pegasos2_pci_config_write(as, !(addr >> 24),
+ pegasos2_pci_config_write(pm, !(addr >> 24),
addr & 0x0fffffff, len, val);
stl_be_phys(as, rets, 0);
return H_SUCCESS;
--
2.21.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 6/6] ppc/pegasos2: Implement power-off RTAS function with VOF
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
` (3 preceding siblings ...)
2021-10-14 19:50 ` [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF BALATON Zoltan
@ 2021-10-14 19:50 ` BALATON Zoltan
2021-10-15 3:19 ` David Gibson
2021-10-14 19:50 ` [PATCH 2/6] ppc/pegasos2: Warn when using VOF but no kernel is specified BALATON Zoltan
2021-10-15 3:20 ` [PATCH 0/6] Misc pegasos2 patches David Gibson
6 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-14 19:50 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: David Gibson
This only helps Linux guests as only that seems to use it.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 39e96d323f..e427ac2fe0 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -22,6 +22,7 @@
#include "hw/i2c/smbus_eeprom.h"
#include "hw/qdev-properties.h"
#include "sysemu/reset.h"
+#include "sysemu/runstate.h"
#include "hw/boards.h"
#include "hw/loader.h"
#include "hw/fw-path-provider.h"
@@ -429,6 +430,16 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
qemu_log_mask(LOG_UNIMP, "%c", ldl_be_phys(as, args));
stl_be_phys(as, rets, 0);
return H_SUCCESS;
+ case RTAS_POWER_OFF:
+ {
+ if (nargs != 2 || nrets != 1) {
+ stl_be_phys(as, rets, -1);
+ return H_PARAMETER;
+ }
+ qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ stl_be_phys(as, rets, 0);
+ return H_SUCCESS;
+ }
default:
qemu_log_mask(LOG_UNIMP, "Unknown RTAS token %u (args=%u, rets=%u)\n",
token, nargs, nrets);
--
2.21.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 1/6] ppc/pegasos2: Restrict memory to 2 gigabytes
2021-10-14 19:50 ` [PATCH 1/6] ppc/pegasos2: Restrict memory to 2 gigabytes BALATON Zoltan
@ 2021-10-15 3:15 ` David Gibson
0 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:15 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1242 bytes --]
On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> The CHRP spec this board confirms to only allows 2 GiB of system
> memory below 4 GiB as the high 2 GiB is allocated to IO and system
> resources. To avoid problems with memory overlapping these areas
> restrict RAM to 2 GiB similar to mac_newworld.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Applied, thanks.
> ---
> hw/ppc/pegasos2.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index b8ce859f1a..474cfdeabf 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -117,6 +117,10 @@ static void pegasos2_init(MachineState *machine)
> qemu_register_reset(pegasos2_cpu_reset, pm->cpu);
>
> /* RAM */
> + if (machine->ram_size > 2 * GiB) {
> + error_report("RAM size more than 2 GiB is not supported");
> + exit(1);
> + }
> memory_region_add_subregion(get_system_memory(), 0, machine->ram);
>
> /* allocate and load firmware */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/6] ppc/pegasos2: Warn when using VOF but no kernel is specified
2021-10-14 19:50 ` [PATCH 2/6] ppc/pegasos2: Warn when using VOF but no kernel is specified BALATON Zoltan
@ 2021-10-15 3:15 ` David Gibson
0 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:15 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1389 bytes --]
On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> Issue a warning when using VOF (which is the default) but no -kernel
> option given to let users know that it will likely fail as the guest
> has nothing to run. It is not a hard error because it may still be
> useful to start the machine without further options for testing or
> inspecting it from monitor without actually booting it.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Applied, thanks.
> ---
> hw/ppc/pegasos2.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index 474cfdeabf..a1dd1f6752 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -194,7 +194,10 @@ static void pegasos2_init(MachineState *machine)
> if (!pm->vof) {
> warn_report("Option -kernel may be ineffective with -bios.");
> }
> + } else if (pm->vof) {
> + warn_report("Using Virtual OpenFirmware but no -kernel option.");
> }
> +
> if (!pm->vof && machine->kernel_cmdline && machine->kernel_cmdline[0]) {
> warn_report("Option -append may be ineffective with -bios.");
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
2021-10-14 19:50 ` [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF BALATON Zoltan
@ 2021-10-15 3:17 ` David Gibson
2021-10-15 9:26 ` BALATON Zoltan
0 siblings, 1 reply; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:17 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 2383 bytes --]
On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> This is needed for Linux to access RTC time.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> hw/ppc/pegasos2.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index a1dd1f6752..a9e3625f56 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -31,6 +31,8 @@
> #include "sysemu/kvm.h"
> #include "kvm_ppc.h"
> #include "exec/address-spaces.h"
> +#include "qom/qom-qobject.h"
> +#include "qapi/qmp/qdict.h"
> #include "trace.h"
> #include "qemu/datadir.h"
> #include "sysemu/device_tree.h"
> @@ -369,6 +371,29 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
> return H_PARAMETER;
> }
> switch (token) {
> + case RTAS_GET_TIME_OF_DAY:
> + {
> + QObject *qo = object_property_get_qobject(qdev_get_machine(),
> + "rtc-time", &error_fatal);
> + QDict *qd = qobject_to(QDict, qo);
> +
> + if (nargs != 0 || nrets != 8 || !qd) {
> + stl_be_phys(as, rets, -1);
> + qobject_unref(qo);
> + return H_PARAMETER;
> + }
> +
> + stl_be_phys(as, rets, 0);
> + stl_be_phys(as, rets + 4, qdict_get_int(qd, "tm_year") + 1900);
> + stl_be_phys(as, rets + 8, qdict_get_int(qd, "tm_mon") + 1);
> + stl_be_phys(as, rets + 12, qdict_get_int(qd, "tm_mday"));
> + stl_be_phys(as, rets + 16, qdict_get_int(qd, "tm_hour"));
> + stl_be_phys(as, rets + 20, qdict_get_int(qd, "tm_min"));
> + stl_be_phys(as, rets + 24, qdict_get_int(qd, "tm_sec"));
Doing a separate dictionary lookup for every component seems like it
might be pretty expensive. You might want to look at how spapr does
this.
However, you're maintainer for pegasos, so really it's your call -
applied, thanks.
> + stl_be_phys(as, rets + 28, 0);
> + qobject_unref(qo);
> + return H_SUCCESS;
> + }
> case RTAS_READ_PCI_CONFIG:
> {
> uint32_t addr, len, val;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region
2021-10-14 19:50 ` [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region BALATON Zoltan
@ 2021-10-15 3:18 ` David Gibson
0 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:18 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 9952 bytes --]
On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> Instead of relying on the mapped address of the MV64361 registers
> access them via their memory region. This is not a problem at reset
> time when these registers are mapped at the default address but the
> guest could change this later and then the RTAS calls accessing PCI
> config registers could fail. None of the guests actually do this so
> this only avoids a theoretical problem not seen in practice.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Applied, thanks.
> ---
> hw/pci-host/mv64361.c | 1 +
> hw/ppc/pegasos2.c | 117 ++++++++++++++++++++----------------------
> 2 files changed, 56 insertions(+), 62 deletions(-)
>
> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
> index 92b0f5d047..00b3ff7d90 100644
> --- a/hw/pci-host/mv64361.c
> +++ b/hw/pci-host/mv64361.c
> @@ -869,6 +869,7 @@ static void mv64361_realize(DeviceState *dev, Error **errp)
> s->base_addr_enable = 0x1fffff;
> memory_region_init_io(&s->regs, OBJECT(s), &mv64361_ops, s,
> TYPE_MV64361, 0x10000);
> + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->regs);
> for (i = 0; i < 2; i++) {
> g_autofree char *name = g_strdup_printf("pcihost%d", i);
> object_initialize_child(OBJECT(dev), name, &s->pci[i],
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index a9e3625f56..a861bf16b8 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -205,56 +205,49 @@ static void pegasos2_init(MachineState *machine)
> }
> }
>
> -static uint32_t pegasos2_pci_config_read(AddressSpace *as, int bus,
> +static uint32_t pegasos2_mv_reg_read(Pegasos2MachineState *pm,
> + uint32_t addr, uint32_t len)
> +{
> + MemoryRegion *r = sysbus_mmio_get_region(SYS_BUS_DEVICE(pm->mv), 0);
> + uint64_t val = 0xffffffffULL;
> + memory_region_dispatch_read(r, addr, &val, size_memop(len) | MO_LE,
> + MEMTXATTRS_UNSPECIFIED);
> + return val;
> +}
> +
> +static void pegasos2_mv_reg_write(Pegasos2MachineState *pm, uint32_t addr,
> + uint32_t len, uint32_t val)
> +{
> + MemoryRegion *r = sysbus_mmio_get_region(SYS_BUS_DEVICE(pm->mv), 0);
> + memory_region_dispatch_write(r, addr, val, size_memop(len) | MO_LE,
> + MEMTXATTRS_UNSPECIFIED);
> +}
> +
> +static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus,
> uint32_t addr, uint32_t len)
> {
> - hwaddr pcicfg = (bus ? 0xf1000c78 : 0xf1000cf8);
> - uint32_t val = 0xffffffff;
> -
> - stl_le_phys(as, pcicfg, addr | BIT(31));
> - switch (len) {
> - case 4:
> - val = ldl_le_phys(as, pcicfg + 4);
> - break;
> - case 2:
> - val = lduw_le_phys(as, pcicfg + 4);
> - break;
> - case 1:
> - val = ldub_phys(as, pcicfg + 4);
> - break;
> - default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid length\n", __func__);
> - break;
> + hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
> + uint64_t val = 0xffffffffULL;
> +
> + if (len <= 4) {
> + pegasos2_mv_reg_write(pm, pcicfg, 4, addr | BIT(31));
> + val = pegasos2_mv_reg_read(pm, pcicfg + 4, len);
> }
> return val;
> }
>
> -static void pegasos2_pci_config_write(AddressSpace *as, int bus, uint32_t addr,
> - uint32_t len, uint32_t val)
> +static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus,
> + uint32_t addr, uint32_t len, uint32_t val)
> {
> - hwaddr pcicfg = (bus ? 0xf1000c78 : 0xf1000cf8);
> -
> - stl_le_phys(as, pcicfg, addr | BIT(31));
> - switch (len) {
> - case 4:
> - stl_le_phys(as, pcicfg + 4, val);
> - break;
> - case 2:
> - stw_le_phys(as, pcicfg + 4, val);
> - break;
> - case 1:
> - stb_phys(as, pcicfg + 4, val);
> - break;
> - default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid length\n", __func__);
> - break;
> - }
> + hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
> +
> + pegasos2_mv_reg_write(pm, pcicfg, 4, addr | BIT(31));
> + pegasos2_mv_reg_write(pm, pcicfg + 4, len, val);
> }
>
> static void pegasos2_machine_reset(MachineState *machine)
> {
> Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine);
> - AddressSpace *as = CPU(pm->cpu)->as;
> void *fdt;
> uint64_t d[2];
> int sz;
> @@ -265,51 +258,51 @@ static void pegasos2_machine_reset(MachineState *machine)
> }
>
> /* Otherwise, set up devices that board firmware would normally do */
> - stl_le_phys(as, 0xf1000000, 0x28020ff);
> - stl_le_phys(as, 0xf1000278, 0xa31fc);
> - stl_le_phys(as, 0xf100f300, 0x11ff0400);
> - stl_le_phys(as, 0xf100f10c, 0x80000000);
> - stl_le_phys(as, 0xf100001c, 0x8000000);
> - pegasos2_pci_config_write(as, 0, PCI_COMMAND, 2, PCI_COMMAND_IO |
> + pegasos2_mv_reg_write(pm, 0, 4, 0x28020ff);
> + pegasos2_mv_reg_write(pm, 0x278, 4, 0xa31fc);
> + pegasos2_mv_reg_write(pm, 0xf300, 4, 0x11ff0400);
> + pegasos2_mv_reg_write(pm, 0xf10c, 4, 0x80000000);
> + pegasos2_mv_reg_write(pm, 0x1c, 4, 0x8000000);
> + pegasos2_pci_config_write(pm, 0, PCI_COMMAND, 2, PCI_COMMAND_IO |
> PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
> - pegasos2_pci_config_write(as, 1, PCI_COMMAND, 2, PCI_COMMAND_IO |
> + pegasos2_pci_config_write(pm, 1, PCI_COMMAND, 2, PCI_COMMAND_IO |
> PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 0) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x9);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 0) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
> 0x50, 1, 0x2);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x109);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
> PCI_CLASS_PROG, 1, 0xf);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
> 0x40, 1, 0xb);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
> 0x50, 4, 0x17171717);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 1) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
> PCI_COMMAND, 2, 0x87);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 2) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 2) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x409);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 3) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 3) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x409);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x9);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
> 0x48, 4, 0xf00);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
> 0x40, 4, 0x558020);
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 4) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 4) << 8) |
> 0x90, 4, 0xd00);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 5) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 5) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x309);
>
> - pegasos2_pci_config_write(as, 1, (PCI_DEVFN(12, 6) << 8) |
> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 6) << 8) |
> PCI_INTERRUPT_LINE, 2, 0x309);
>
> /* Device tree and VOF set up */
> @@ -404,7 +397,7 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
> }
> addr = ldl_be_phys(as, args);
> len = ldl_be_phys(as, args + 4);
> - val = pegasos2_pci_config_read(as, !(addr >> 24),
> + val = pegasos2_pci_config_read(pm, !(addr >> 24),
> addr & 0x0fffffff, len);
> stl_be_phys(as, rets, 0);
> stl_be_phys(as, rets + 4, val);
> @@ -421,7 +414,7 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
> addr = ldl_be_phys(as, args);
> len = ldl_be_phys(as, args + 4);
> val = ldl_be_phys(as, args + 8);
> - pegasos2_pci_config_write(as, !(addr >> 24),
> + pegasos2_pci_config_write(pm, !(addr >> 24),
> addr & 0x0fffffff, len, val);
> stl_be_phys(as, rets, 0);
> return H_SUCCESS;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] ppc/pegasos2: Add constants for PCI config addresses
2021-10-14 19:50 ` [PATCH 5/6] ppc/pegasos2: Add constants for PCI config addresses BALATON Zoltan
@ 2021-10-15 3:19 ` David Gibson
0 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:19 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1996 bytes --]
On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> Define a constant for PCI config addresses to make it clearer what
> these numbers are.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Applied, thanks.
> ---
> hw/ppc/pegasos2.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index a861bf16b8..39e96d323f 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -54,11 +54,13 @@
>
> #define BUS_FREQ_HZ 133333333
>
> +#define PCI0_CFG_ADDR 0xcf8
> #define PCI0_MEM_BASE 0xc0000000
> #define PCI0_MEM_SIZE 0x20000000
> #define PCI0_IO_BASE 0xf8000000
> #define PCI0_IO_SIZE 0x10000
>
> +#define PCI1_CFG_ADDR 0xc78
> #define PCI1_MEM_BASE 0x80000000
> #define PCI1_MEM_SIZE 0x40000000
> #define PCI1_IO_BASE 0xfe000000
> @@ -226,7 +228,7 @@ static void pegasos2_mv_reg_write(Pegasos2MachineState *pm, uint32_t addr,
> static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus,
> uint32_t addr, uint32_t len)
> {
> - hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
> + hwaddr pcicfg = bus ? PCI1_CFG_ADDR : PCI0_CFG_ADDR;
> uint64_t val = 0xffffffffULL;
>
> if (len <= 4) {
> @@ -239,7 +241,7 @@ static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus,
> static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus,
> uint32_t addr, uint32_t len, uint32_t val)
> {
> - hwaddr pcicfg = bus ? 0xc78 : 0xcf8;
> + hwaddr pcicfg = bus ? PCI1_CFG_ADDR : PCI0_CFG_ADDR;
>
> pegasos2_mv_reg_write(pm, pcicfg, 4, addr | BIT(31));
> pegasos2_mv_reg_write(pm, pcicfg + 4, len, val);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 6/6] ppc/pegasos2: Implement power-off RTAS function with VOF
2021-10-14 19:50 ` [PATCH 6/6] ppc/pegasos2: Implement power-off " BALATON Zoltan
@ 2021-10-15 3:19 ` David Gibson
0 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:19 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
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On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> This only helps Linux guests as only that seems to use it.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Applied, thanks.
> ---
> hw/ppc/pegasos2.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index 39e96d323f..e427ac2fe0 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -22,6 +22,7 @@
> #include "hw/i2c/smbus_eeprom.h"
> #include "hw/qdev-properties.h"
> #include "sysemu/reset.h"
> +#include "sysemu/runstate.h"
> #include "hw/boards.h"
> #include "hw/loader.h"
> #include "hw/fw-path-provider.h"
> @@ -429,6 +430,16 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
> qemu_log_mask(LOG_UNIMP, "%c", ldl_be_phys(as, args));
> stl_be_phys(as, rets, 0);
> return H_SUCCESS;
> + case RTAS_POWER_OFF:
> + {
> + if (nargs != 2 || nrets != 1) {
> + stl_be_phys(as, rets, -1);
> + return H_PARAMETER;
> + }
> + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
> + stl_be_phys(as, rets, 0);
> + return H_SUCCESS;
> + }
> default:
> qemu_log_mask(LOG_UNIMP, "Unknown RTAS token %u (args=%u, rets=%u)\n",
> token, nargs, nrets);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/6] Misc pegasos2 patches
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
` (5 preceding siblings ...)
2021-10-14 19:50 ` [PATCH 2/6] ppc/pegasos2: Warn when using VOF but no kernel is specified BALATON Zoltan
@ 2021-10-15 3:20 ` David Gibson
2021-10-15 9:28 ` BALATON Zoltan
6 siblings, 1 reply; 17+ messages in thread
From: David Gibson @ 2021-10-15 3:20 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-ppc, qemu-devel
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On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
> Some small clean ups and improvements for the pegasos2 machine.
>
> BALATON Zoltan (6):
> ppc/pegasos2: Restrict memory to 2 gigabytes
> ppc/pegasos2: Warn when using VOF but no kernel is specified
> ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
> ppc/pegasos2: Access MV64361 registers via their memory region
> ppc/pegasos2: Add constants for PCI config addresses
> ppc/pegasos2: Implement power-off RTAS function with VOF
Do you use git send-email to send out your patches, or something else?
For some reason your patchsets, unlike most people's end up with the
order completely jumbled in my inbox, which makes applying them a bit
annoying.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
2021-10-15 3:17 ` David Gibson
@ 2021-10-15 9:26 ` BALATON Zoltan
2021-10-15 21:51 ` BALATON Zoltan
0 siblings, 1 reply; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-15 9:26 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel
On Fri, 15 Oct 2021, David Gibson wrote:
> On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
>> This is needed for Linux to access RTC time.
>>
>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>> ---
>> hw/ppc/pegasos2.c | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
>> index a1dd1f6752..a9e3625f56 100644
>> --- a/hw/ppc/pegasos2.c
>> +++ b/hw/ppc/pegasos2.c
>> @@ -31,6 +31,8 @@
>> #include "sysemu/kvm.h"
>> #include "kvm_ppc.h"
>> #include "exec/address-spaces.h"
>> +#include "qom/qom-qobject.h"
>> +#include "qapi/qmp/qdict.h"
>> #include "trace.h"
>> #include "qemu/datadir.h"
>> #include "sysemu/device_tree.h"
>> @@ -369,6 +371,29 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
>> return H_PARAMETER;
>> }
>> switch (token) {
>> + case RTAS_GET_TIME_OF_DAY:
>> + {
>> + QObject *qo = object_property_get_qobject(qdev_get_machine(),
>> + "rtc-time", &error_fatal);
>> + QDict *qd = qobject_to(QDict, qo);
>> +
>> + if (nargs != 0 || nrets != 8 || !qd) {
>> + stl_be_phys(as, rets, -1);
>> + qobject_unref(qo);
>> + return H_PARAMETER;
>> + }
>> +
>> + stl_be_phys(as, rets, 0);
>> + stl_be_phys(as, rets + 4, qdict_get_int(qd, "tm_year") + 1900);
>> + stl_be_phys(as, rets + 8, qdict_get_int(qd, "tm_mon") + 1);
>> + stl_be_phys(as, rets + 12, qdict_get_int(qd, "tm_mday"));
>> + stl_be_phys(as, rets + 16, qdict_get_int(qd, "tm_hour"));
>> + stl_be_phys(as, rets + 20, qdict_get_int(qd, "tm_min"));
>> + stl_be_phys(as, rets + 24, qdict_get_int(qd, "tm_sec"));
>
> Doing a separate dictionary lookup for every component seems like it
> might be pretty expensive. You might want to look at how spapr does
> this.
This is the only short way I could find to read the RTC the same way as
the guest or firmware would. I wasn't sure because the rtc model has an
update rtc function that it calls before reads to set the values but that
looks like doing the same as spapr does so I'll send another patch
replacing this with that then.
Thanks,
BALATON Zoltan
> However, you're maintainer for pegasos, so really it's your call -
> applied, thanks.
>
>> + stl_be_phys(as, rets + 28, 0);
>> + qobject_unref(qo);
>> + return H_SUCCESS;
>> + }
>> case RTAS_READ_PCI_CONFIG:
>> {
>> uint32_t addr, len, val;
>
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/6] Misc pegasos2 patches
2021-10-15 3:20 ` [PATCH 0/6] Misc pegasos2 patches David Gibson
@ 2021-10-15 9:28 ` BALATON Zoltan
0 siblings, 0 replies; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-15 9:28 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel
On Fri, 15 Oct 2021, David Gibson wrote:
> On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
>> Some small clean ups and improvements for the pegasos2 machine.
>>
>> BALATON Zoltan (6):
>> ppc/pegasos2: Restrict memory to 2 gigabytes
>> ppc/pegasos2: Warn when using VOF but no kernel is specified
>> ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
>> ppc/pegasos2: Access MV64361 registers via their memory region
>> ppc/pegasos2: Add constants for PCI config addresses
>> ppc/pegasos2: Implement power-off RTAS function with VOF
>
> Do you use git send-email to send out your patches, or something else?
>
> For some reason your patchsets, unlike most people's end up with the
> order completely jumbled in my inbox, which makes applying them a bit
> annoying.
I'm sending mails with something else but may try to add a delay between
mails to try to force them to be ordered.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
2021-10-15 9:26 ` BALATON Zoltan
@ 2021-10-15 21:51 ` BALATON Zoltan
0 siblings, 0 replies; 17+ messages in thread
From: BALATON Zoltan @ 2021-10-15 21:51 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel
On Fri, 15 Oct 2021, BALATON Zoltan wrote:
> On Fri, 15 Oct 2021, David Gibson wrote:
>> On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
>>> This is needed for Linux to access RTC time.
>>>
>>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>>> ---
>>> hw/ppc/pegasos2.c | 25 +++++++++++++++++++++++++
>>> 1 file changed, 25 insertions(+)
>>>
>>> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
>>> index a1dd1f6752..a9e3625f56 100644
>>> --- a/hw/ppc/pegasos2.c
>>> +++ b/hw/ppc/pegasos2.c
>>> @@ -31,6 +31,8 @@
>>> #include "sysemu/kvm.h"
>>> #include "kvm_ppc.h"
>>> #include "exec/address-spaces.h"
>>> +#include "qom/qom-qobject.h"
>>> +#include "qapi/qmp/qdict.h"
>>> #include "trace.h"
>>> #include "qemu/datadir.h"
>>> #include "sysemu/device_tree.h"
>>> @@ -369,6 +371,29 @@ static target_ulong pegasos2_rtas(PowerPCCPU *cpu,
>>> Pegasos2MachineState *pm,
>>> return H_PARAMETER;
>>> }
>>> switch (token) {
>>> + case RTAS_GET_TIME_OF_DAY:
>>> + {
>>> + QObject *qo = object_property_get_qobject(qdev_get_machine(),
>>> + "rtc-time",
>>> &error_fatal);
>>> + QDict *qd = qobject_to(QDict, qo);
>>> +
>>> + if (nargs != 0 || nrets != 8 || !qd) {
>>> + stl_be_phys(as, rets, -1);
>>> + qobject_unref(qo);
>>> + return H_PARAMETER;
>>> + }
>>> +
>>> + stl_be_phys(as, rets, 0);
>>> + stl_be_phys(as, rets + 4, qdict_get_int(qd, "tm_year") + 1900);
>>> + stl_be_phys(as, rets + 8, qdict_get_int(qd, "tm_mon") + 1);
>>> + stl_be_phys(as, rets + 12, qdict_get_int(qd, "tm_mday"));
>>> + stl_be_phys(as, rets + 16, qdict_get_int(qd, "tm_hour"));
>>> + stl_be_phys(as, rets + 20, qdict_get_int(qd, "tm_min"));
>>> + stl_be_phys(as, rets + 24, qdict_get_int(qd, "tm_sec"));
>>
>> Doing a separate dictionary lookup for every component seems like it
>> might be pretty expensive. You might want to look at how spapr does
>> this.
>
> This is the only short way I could find to read the RTC the same way as the
> guest or firmware would. I wasn't sure because the rtc model has an update
> rtc function that it calls before reads to set the values but that looks like
> doing the same as spapr does so I'll send another patch replacing this with
> that then.
Forget it. I've looked at it and to get the time that way fitst we'd need
the RTCState struct which we don't readily have as it's part of the vt8231
device which creates it internally so the pegasos2 code does not see it
directly but would need some qdev magic to find it. Then we would need to
either export or duplicate the get_guest_rtc_ns() function from
hw/rtc/mc146818rtc.c to get the guest clock. Since reading the rtc via
RTAS is not a frequent operation and probably also slow on real hardware I
can live with the above QObject solution so just keep this patch for now.
It's only used by Linux to access hardware clock anyway.
Regards,
BALATON Zoltan
>> However, you're maintainer for pegasos, so really it's your call -
>> applied, thanks.
>>
>>> + stl_be_phys(as, rets + 28, 0);
>>> + qobject_unref(qo);
>>> + return H_SUCCESS;
>>> + }
>>> case RTAS_READ_PCI_CONFIG:
>>> {
>>> uint32_t addr, len, val;
>>
>>
>
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2021-10-15 21:52 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-14 19:50 [PATCH 0/6] Misc pegasos2 patches BALATON Zoltan
2021-10-14 19:50 ` [PATCH 4/6] ppc/pegasos2: Access MV64361 registers via their memory region BALATON Zoltan
2021-10-15 3:18 ` David Gibson
2021-10-14 19:50 ` [PATCH 1/6] ppc/pegasos2: Restrict memory to 2 gigabytes BALATON Zoltan
2021-10-15 3:15 ` David Gibson
2021-10-14 19:50 ` [PATCH 5/6] ppc/pegasos2: Add constants for PCI config addresses BALATON Zoltan
2021-10-15 3:19 ` David Gibson
2021-10-14 19:50 ` [PATCH 3/6] ppc/pegasos2: Implement get-time-of-day RTAS function with VOF BALATON Zoltan
2021-10-15 3:17 ` David Gibson
2021-10-15 9:26 ` BALATON Zoltan
2021-10-15 21:51 ` BALATON Zoltan
2021-10-14 19:50 ` [PATCH 6/6] ppc/pegasos2: Implement power-off " BALATON Zoltan
2021-10-15 3:19 ` David Gibson
2021-10-14 19:50 ` [PATCH 2/6] ppc/pegasos2: Warn when using VOF but no kernel is specified BALATON Zoltan
2021-10-15 3:15 ` David Gibson
2021-10-15 3:20 ` [PATCH 0/6] Misc pegasos2 patches David Gibson
2021-10-15 9:28 ` BALATON Zoltan
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