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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This patch series adds the relevant phy and controller configurations for enabling USB on IPQ9754 Depends on: https://lore.kernel.org/all/20230217142030.16012-1-quic_devipriy@quicinc.com/ [v2]: - Incorporated review comments regarding coding styler, maintaining sorted order of entries and unused phy register offsets - Removed NOC clock entries from DT node (will be implemented later with interconnect support) - Fixed 'make dtbs_check' errors/warnings [v1]: https://lore.kernel.org/linux-arm-msm/5dac3aa4-8dc7-f9eb-5cf3-b361efdc9494@linaro.org/T/ Varadarajan Narayanan (8): dt-bindings: phy: qcom,qusb2: Document IPQ9574 compatible dt-bindings: phy: qcom,qmp-usb: Add IPQ9574 USB3 PHY dt-bindings: usb: dwc3: Add IPQ9574 compatible clk: qcom: gcc-ipq9574: Add USB related clocks phy: qcom-qusb2: add QUSB2 support for IPQ9574 phy: qcom: qmp: Update IPQ9574 USB Phy initialization Sequence arm64: dts: qcom: ipq9574: Add USB related nodes arm64: dts: qcom: ipq9574: Enable USB .../bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml | 22 ++++ .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 3 +- .../devicetree/bindings/usb/qcom,dwc3.yaml | 1 + arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts | 12 +++ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 86 +++++++++++++++ drivers/clk/qcom/gcc-ipq9574.c | 37 +++++++ drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 119 +++++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 + include/dt-bindings/clock/qcom,ipq9574-gcc.h | 2 + 9 files changed, 284 insertions(+), 1 deletion(-) -- 2.7.4 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A054C761AF for ; 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Tue, 21 Mar 2023 08:55:15 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32L8tE3R024046 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Mar 2023 08:55:14 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 21 Mar 2023 01:55:08 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 0/8] Enable IPQ9754 USB Date: Tue, 21 Mar 2023 14:24:18 +0530 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: -z64bNJ8k1YDT4yzVj_eCInGiJUjEJuI X-Proofpoint-GUID: -z64bNJ8k1YDT4yzVj_eCInGiJUjEJuI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-21_06,2023-03-20_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=564 lowpriorityscore=0 bulkscore=0 adultscore=0 spamscore=0 clxscore=1015 phishscore=0 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303210068 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch series adds the relevant phy and controller configurations for enabling USB on IPQ9754 Depends on: https://lore.kernel.org/all/20230217142030.16012-1-quic_devipriy@quicinc.com/ [v2]: - Incorporated review comments regarding coding styler, maintaining sorted order of entries and unused phy register offsets - Removed NOC clock entries from DT node (will be implemented later with interconnect support) - Fixed 'make dtbs_check' errors/warnings [v1]: https://lore.kernel.org/linux-arm-msm/5dac3aa4-8dc7-f9eb-5cf3-b361efdc9494@linaro.org/T/ Varadarajan Narayanan (8): dt-bindings: phy: qcom,qusb2: Document IPQ9574 compatible dt-bindings: phy: qcom,qmp-usb: Add IPQ9574 USB3 PHY dt-bindings: usb: dwc3: Add IPQ9574 compatible clk: qcom: gcc-ipq9574: Add USB related clocks phy: qcom-qusb2: add QUSB2 support for IPQ9574 phy: qcom: qmp: Update IPQ9574 USB Phy initialization Sequence arm64: dts: qcom: ipq9574: Add USB related nodes arm64: dts: qcom: ipq9574: Enable USB .../bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml | 22 ++++ .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 3 +- .../devicetree/bindings/usb/qcom,dwc3.yaml | 1 + arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts | 12 +++ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 86 +++++++++++++++ drivers/clk/qcom/gcc-ipq9574.c | 37 +++++++ drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 119 +++++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 + include/dt-bindings/clock/qcom,ipq9574-gcc.h | 2 + 9 files changed, 284 insertions(+), 1 deletion(-) -- 2.7.4