From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12752C433EF for ; Wed, 9 Feb 2022 06:06:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233147AbiBIGGA (ORCPT ); Wed, 9 Feb 2022 01:06:00 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:51866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234279AbiBIGBM (ORCPT ); Wed, 9 Feb 2022 01:01:12 -0500 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D22F6C050CC2; Tue, 8 Feb 2022 22:01:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1644386474; x=1675922474; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=4peUR/FlwKBQOuJfd2ZZpHK3WkZEECAcE1WpoWtMvdg=; b=FOjcW4zE2r5tgp4QWaTHBUPV5Q+BLMpaJMdoH+RAzvZCjVzA/8ATbbp9 3N2VMZ7m+R/NjI48FcBEU5kHB+Q7/za/1fN31j+VlnRQOepcd1y27R+GY 69VLUE7FL7QBJk6UQy/ffLhtcKI1Rp5AdgRORXFOlau7Uf9+A+34dx3nI o=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-01.qualcomm.com with ESMTP; 08 Feb 2022 22:01:14 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2022 22:01:14 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Tue, 8 Feb 2022 22:01:13 -0800 Received: from [10.216.51.153] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Tue, 8 Feb 2022 22:01:10 -0800 Message-ID: Date: Wed, 9 Feb 2022 11:31:06 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v5] usb: host: xhci-plat: Set XHCI_SKIP_PHY_INIT quirk for DWC3 controller Content-Language: en-US To: Pavan Kondeti , Greg Kroah-Hartman CC: Felipe Balbi , Stephen Boyd , "Doug Anderson" , Matthias Kaehlcke , Mathias Nyman , , , , References: <1640153383-21036-1-git-send-email-quic_c_sanm@quicinc.com> <20220209055352.GA22550@hu-pkondeti-hyd.qualcomm.com> From: Sandeep Maheswaram In-Reply-To: <20220209055352.GA22550@hu-pkondeti-hyd.qualcomm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2/9/2022 11:23 AM, Pavan Kondeti wrote: > On Tue, Feb 08, 2022 at 11:11:53AM +0100, Greg Kroah-Hartman wrote: >> On Tue, Feb 08, 2022 at 03:34:22PM +0530, Sandeep Maheswaram wrote: >>> Hi Greg, >>> >>> On 1/27/2022 10:28 AM, Sandeep Maheswaram wrote: >>>> On 1/26/2022 5:55 PM, Greg Kroah-Hartman wrote: >>>>> On Fri, Jan 07, 2022 at 10:27:59AM +0530, Sandeep Maheswaram wrote: >>>>>> On 1/6/2022 7:55 PM, Greg Kroah-Hartman wrote: >>>>>>> On Wed, Dec 22, 2021 at 11:39:43AM +0530, Sandeep Maheswaram wrote: >>>>>>>> Set XHCI_SKIP_PHY_INIT quirk to avoid phy initialization twice. >>>>>>>> Runtime suspend of phy drivers was failing from DWC3 >>>>>>>> driver as runtime >>>>>>>> usage value is 2 because the phy is initialized from >>>>>>>> DWC3 and HCD core. >>>>>>>> DWC3 manages phy in their core drivers. Set this quirk to avoid phy >>>>>>>> initialization in HCD core. >>>>>>>> >>>>>>>> Signed-off-by: Sandeep Maheswaram >>>>>>>> --- >>>>>>>> v5: >>>>>>>> Added comment to explain the change done. >>>>>>>> v4: >>>>>>>> Changed pdev->dev.parent->of_node to sysdev->of_node >>>>>>>> >>>>>>>>    drivers/usb/host/xhci-plat.c | 8 ++++++++ >>>>>>>>    1 file changed, 8 insertions(+) >>>>>>>> >>>>>>>> diff --git a/drivers/usb/host/xhci-plat.c >>>>>>>> b/drivers/usb/host/xhci-plat.c >>>>>>>> index c1edcc9..e6014d4 100644 >>>>>>>> --- a/drivers/usb/host/xhci-plat.c >>>>>>>> +++ b/drivers/usb/host/xhci-plat.c >>>>>>>> @@ -327,6 +327,14 @@ static int xhci_plat_probe(struct >>>>>>>> platform_device *pdev) >>>>>>>>                         &xhci->imod_interval); >>>>>>>>        } >>>>>>>> +    /* >>>>>>>> +     * Set XHCI_SKIP_PHY_INIT quirk to avoid phy >>>>>>>> initialization twice. >>>>>>>> +     * DWC3 manages phy in their core drivers. Set this >>>>>>>> quirk to avoid phy >>>>>>>> +     * initialization in HCD core. >>>>>>>> +     */ >>>>>>>> +    if (of_device_is_compatible(sysdev->of_node, "snps,dwc3")) >>>>>>>> +        xhci->quirks |= XHCI_SKIP_PHY_INIT; >>>>>>>> + >>>>>>> Why is this function caring about dwc3 stuff?  Shoudn't this be a >>>>>>> "generic" device property instead of this device-specific one? >>>>>>> >>>>>>> thanks, >>>>>>> >>>>>>> greg k-h >>>>>> This quirk is set only if required for some controllers (eg: >>>>>> dwc3 & cdns3). >>>>>> >>>>>> Please check below commit. >>>>>> >>>>>> https://lore.kernel.org/all/20200918131752.16488-5-mathias.nyman@linux.intel.com/ >>>>>> >>>>> That commit has nothing to do with a specific "dwc3" quirk anywhere. >>>>> Why not set this flag in the specific platform xhci driver instead where >>>>> it belongs? >>>>> >>>>> thanks, >>>>> >>>>> greg k-h >>>> There is no specific xhci platform driver for dwc3 controllers. >>>> >>>> dwc3 controllers use xhci-plat driver . >>>> >>>> We can add this quirk in usb/dwc3/host.c as cdns3 does but that requires >>>> tying dwc3 and xhci driver . >>>> >>>> https://patchwork.kernel.org/project/linux-arm-msm/patch/1633946518-13906-1-git-send-email-sanm@codeaurora.org/ >>>> >>>> >>>> Regards >>>> >>>> Sandeep >>>> >>>> >>> Can you suggest any other method to set this quirk for dwc3 controllers. >> No idea, sorry. > Sandeep, > > I agree with Greg's comments here. The compatible based check to detect dwc3 > controller is not elegant. Your proposal of adding a device tree param is > overkill, I believe. > > Greg already gave us a pointer here [1] which I feel is the best approach going > forward. We know that xhci-plat is being used by drivers like dwc3, cdns3 and > these drivers need to expose their xhci quirks. As Greg suggested, why can't > we move xhci quirks definition to include/linux/usb/xhci-quriks.h and directly > access from the glue drivers? The attached is the patch (completely untested) > for your reference. It will prepare the setup for you to add the private data > and quirks in the dwc3 host glue driver. > > Thanks, > Pavan > > [1] > https://patchwork.kernel.org/project/linux-arm-msm/patch/1633946518-13906-1-git-send-email-sanm@codeaurora.org/ > Thanks Pavan..will test the patch.