From: Raju P L S S S N <rplsssn@codeaurora.org>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net,
ulf.hansson@linaro.org, khilman@kernel.org,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
rnayak@codeaurora.org, bjorn.andersson@linaro.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, sboyd@kernel.org,
evgreen@chromium.org, dianders@chromium.org, mka@chromium.org,
ilina@codeaurora.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Subject: Re: [PATCH RFC v1 5/8] dt-bindings: introduce cpu power domain bindings for Qualcomm SoCs
Date: Fri, 12 Oct 2018 23:38:11 +0530 [thread overview]
Message-ID: <d023628d-d130-d353-db5d-4c8a8e7be34e@codeaurora.org> (raw)
In-Reply-To: <20181011110849.GA32752@e107155-lin>
On 10/11/2018 4:38 PM, Sudeep Holla wrote:
> On Thu, Oct 11, 2018 at 02:50:52AM +0530, Raju P.L.S.S.S.N wrote:
>> Add device binding documentation for Qualcomm Technology Inc's cpu
>> domain driver. The driver is used for managing system sleep activities
>> that are required when application processor is going to deepest low
>> power mode.
>>
>
> So either we are not using PSCI or the binding is not so clear on
> how this co-exist with PSCI power domains. Could you provide details ?
>
>> Cc: devicetree@vger.kernel.org
>> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
>> ---
>> .../bindings/soc/qcom/cpu_power_domain.txt | 39 ++++++++++++++++++++++
>> 1 file changed, 39 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt
>>
>> diff --git a/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt b/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt
>> new file mode 100644
>> index 0000000..1c8fe69
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt
>> @@ -0,0 +1,39 @@
>> +Qualcomm Technologies cpu power domain
>> +-----------------------------------------
>> +
>> +CPU power domain handles the tasks that need to be performed during
>> +application processor deeper low power mode entry for QCOM SoCs which
>> +have hardened IP blocks combinedly called as RPMH (Resource Power Manager
>> +Hardened) for shared resource management. Flushing the buffered requests
>> +to TCS (Triggered Command Set) in RSC (Resource State Coordinator) and
>> +programming the wakeup timer in PDC (Power Domain Controller) for timer
>> +based wakeup are handled as part of domain power down.
>> +
>
> And which is this not hidden as part of PSCI CPU_SUSPEND ?
>
>> +The bindings for cpu power domain is specified in the RSC section in
>> +devicetree.
>> +
>> +Properties:
>> +- compatible:
>> + Usage: required
>> + Value type: <string>
>> + Definition: must be "qcom,cpu-pm-domain".
>> +
>
> NACK until details on how this can co-exist with PSCI is provided.
Platform coordinated mode is used on this SoC. So they both can
co-exist. I hope with the discussion on other thread, the details are clear.
>
> --
> Regards,
> Sudeep
>
next prev parent reply other threads:[~2018-10-12 18:08 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-10 21:20 [PATCH RFC v1 0/8] drivers: qcom: Add cpu power domain for SDM845 Raju P.L.S.S.S.N
2018-10-10 21:20 ` [PATCH RFC v1 1/8] PM / Domains: Add helper functions to attach/detach CPUs to/from genpd Raju P.L.S.S.S.N
2018-10-10 21:20 ` [PATCH RFC v1 2/8] kernel/cpu_pm: Manage runtime PM in the idle path for CPUs Raju P.L.S.S.S.N
2018-10-11 20:52 ` Rafael J. Wysocki
2018-10-11 22:08 ` Lina Iyer
2018-10-12 7:43 ` Rafael J. Wysocki
2018-10-12 10:20 ` Ulf Hansson
2018-10-12 15:20 ` Lina Iyer
2018-10-10 21:20 ` [PATCH RFC v1 3/8] timer: Export next wakeup time of a CPU Raju P.L.S.S.S.N
2018-10-29 22:36 ` Thomas Gleixner
2018-10-30 10:29 ` Ulf Hansson
2018-10-30 10:29 ` Ulf Hansson
2018-10-10 21:20 ` [PATCH RFC v1 4/8] drivers: qcom: cpu_pd: add cpu power domain support using genpd Raju P.L.S.S.S.N
2018-10-11 11:13 ` Sudeep Holla
2018-10-11 15:27 ` Ulf Hansson
2018-10-11 15:59 ` Sudeep Holla
2018-10-12 9:23 ` Ulf Hansson
2018-10-12 14:33 ` Sudeep Holla
2018-10-12 18:01 ` Raju P L S S S N
2018-10-10 21:20 ` [PATCH RFC v1 5/8] dt-bindings: introduce cpu power domain bindings for Qualcomm SoCs Raju P.L.S.S.S.N
2018-10-11 11:08 ` Sudeep Holla
2018-10-12 18:08 ` Raju P L S S S N [this message]
2018-10-10 21:20 ` [PATCH RFC v1 6/8] drivers: qcom: cpu_pd: program next wakeup to PDC timer Raju P.L.S.S.S.N
2018-10-10 21:20 ` [PATCH RFC v1 7/8] drivers: qcom: cpu_pd: Handle cpu hotplug in the domain Raju P.L.S.S.S.N
2018-10-11 11:20 ` Sudeep Holla
2018-10-11 16:00 ` Lina Iyer
2018-10-11 16:19 ` Sudeep Holla
2018-10-11 16:58 ` Lina Iyer
2018-10-11 17:37 ` Sudeep Holla
2018-10-11 21:06 ` Lina Iyer
2018-10-12 15:04 ` Sudeep Holla
2018-10-12 15:46 ` Ulf Hansson
2018-10-12 16:16 ` Lina Iyer
2018-10-12 16:33 ` Sudeep Holla
2018-10-12 16:04 ` Lina Iyer
2018-10-12 17:00 ` Sudeep Holla
2018-10-12 17:19 ` Lina Iyer
2018-10-12 17:25 ` Sudeep Holla
2018-10-22 19:50 ` Lina Iyer
2018-10-12 14:25 ` Sudeep Holla
2018-10-12 18:10 ` Raju P L S S S N
2018-10-10 21:20 ` [PATCH RFC v1 8/8] arm64: dtsi: sdm845: Add cpu power domain support Raju P.L.S.S.S.N
2018-10-12 17:35 ` Sudeep Holla
2018-10-12 17:52 ` Lina Iyer
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