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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Marc Zyngier <maz@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
	mathieu.poirier@linaro.org, mike.leach@linaro.org,
	lcherian@marvell.com, linux-kernel@vger.kernel.org,
	Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH V3 10/14] arm64: nvhe: Allow TRBE access at EL1
Date: Thu, 28 Jan 2021 09:34:11 +0000	[thread overview]
Message-ID: <d0daf831-3340-87f2-a021-0b775ce7af2a@arm.com> (raw)
In-Reply-To: <12b1572e2568d4936f0458649065fe64@kernel.org>

On 1/27/21 9:58 AM, Marc Zyngier wrote:
> On 2021-01-27 08:55, Anshuman Khandual wrote:
>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>> When the kernel is booted at EL2 in a nvhe configuration,
>> enable the TRBE access to the EL1. The EL1 still can't trace
>> EL2, unless EL2 permits explicitly via TRFCR_EL2.E2TRE.
>>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> cc: Anshuman Khandual <anshuman.khandual@arm.com>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> 
> Acked-by: Marc Zyngier <maz@kernel.org>
> 
> One comment below, though:
> 
>> ---
>>  arch/arm64/include/asm/el2_setup.h | 19 +++++++++++++++++++
>>  arch/arm64/include/asm/kvm_arm.h   |  2 ++
>>  2 files changed, 21 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/el2_setup.h
>> b/arch/arm64/include/asm/el2_setup.h
>> index a7f5a1b..05ecce9 100644
>> --- a/arch/arm64/include/asm/el2_setup.h
>> +++ b/arch/arm64/include/asm/el2_setup.h
>> @@ -72,6 +72,25 @@
>>  .endif
>>
>>  3:
>> +
>> +.ifeqs    "\mode", "nvhe"
>> +    /*
>> +     * If the Trace Buffer is available, allow
>> +     * the EL1 to own it. Note that EL1 cannot
>> +     * trace the EL2, as it is prevented by
>> +     * TRFCR_EL2.E2TRE == 0.
>> +     */
>> +    ubfx    x0, x1, #ID_AA64DFR0_TRBE_SHIFT, #4
>> +    cbz    x0, 1f
>> +
>> +    mrs_s    x0, SYS_TRBIDR_EL1
>> +    and    x0, x0, TRBIDR_PROG
>> +    cbnz    x0, 1f
>> +    mov    x0, #(MDCR_EL2_E2TB_EL1_OWN << MDCR_EL2_E2TB_SHIFT)
>> +    orr    x2, x2, x0
>> +.endif
>> +
>> +1:
> 
> Note that this will (badly) conflict with the late-VHE patches[1],
> where this code path has been reworked.

Thanks for the heads up. We will need to see how things get merged.
Ideally this patch and the previous one (TRBE definitions could go
via the arm64 tree / kvm tree), in which case we could rebase these
two patches on the respective tree.

Cheers
Suzuki

WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Marc Zyngier <maz@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	mathieu.poirier@linaro.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	coresight@lists.linaro.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	lcherian@marvell.com, mike.leach@linaro.org
Subject: Re: [PATCH V3 10/14] arm64: nvhe: Allow TRBE access at EL1
Date: Thu, 28 Jan 2021 09:34:11 +0000	[thread overview]
Message-ID: <d0daf831-3340-87f2-a021-0b775ce7af2a@arm.com> (raw)
In-Reply-To: <12b1572e2568d4936f0458649065fe64@kernel.org>

On 1/27/21 9:58 AM, Marc Zyngier wrote:
> On 2021-01-27 08:55, Anshuman Khandual wrote:
>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>> When the kernel is booted at EL2 in a nvhe configuration,
>> enable the TRBE access to the EL1. The EL1 still can't trace
>> EL2, unless EL2 permits explicitly via TRFCR_EL2.E2TRE.
>>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> cc: Anshuman Khandual <anshuman.khandual@arm.com>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> 
> Acked-by: Marc Zyngier <maz@kernel.org>
> 
> One comment below, though:
> 
>> ---
>>  arch/arm64/include/asm/el2_setup.h | 19 +++++++++++++++++++
>>  arch/arm64/include/asm/kvm_arm.h   |  2 ++
>>  2 files changed, 21 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/el2_setup.h
>> b/arch/arm64/include/asm/el2_setup.h
>> index a7f5a1b..05ecce9 100644
>> --- a/arch/arm64/include/asm/el2_setup.h
>> +++ b/arch/arm64/include/asm/el2_setup.h
>> @@ -72,6 +72,25 @@
>>  .endif
>>
>>  3:
>> +
>> +.ifeqs    "\mode", "nvhe"
>> +    /*
>> +     * If the Trace Buffer is available, allow
>> +     * the EL1 to own it. Note that EL1 cannot
>> +     * trace the EL2, as it is prevented by
>> +     * TRFCR_EL2.E2TRE == 0.
>> +     */
>> +    ubfx    x0, x1, #ID_AA64DFR0_TRBE_SHIFT, #4
>> +    cbz    x0, 1f
>> +
>> +    mrs_s    x0, SYS_TRBIDR_EL1
>> +    and    x0, x0, TRBIDR_PROG
>> +    cbnz    x0, 1f
>> +    mov    x0, #(MDCR_EL2_E2TB_EL1_OWN << MDCR_EL2_E2TB_SHIFT)
>> +    orr    x2, x2, x0
>> +.endif
>> +
>> +1:
> 
> Note that this will (badly) conflict with the late-VHE patches[1],
> where this code path has been reworked.

Thanks for the heads up. We will need to see how things get merged.
Ideally this patch and the previous one (TRBE definitions could go
via the arm64 tree / kvm tree), in which case we could rebase these
two patches on the respective tree.

Cheers
Suzuki

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-01-28  9:40 UTC|newest]

Thread overview: 181+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27  8:55 [PATCH V3 00/14] arm64: coresight: Enable ETE and TRBE Anshuman Khandual
2021-01-27  8:55 ` Anshuman Khandual
2021-01-27  8:55 ` [PATCH V3 01/14] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-01 23:17   ` Mathieu Poirier
2021-02-01 23:17     ` Mathieu Poirier
2021-02-02  9:42     ` Suzuki K Poulose
2021-02-02  9:42       ` Suzuki K Poulose
2021-02-02 16:33       ` Mike Leach
2021-02-02 16:33         ` Mike Leach
2021-02-02 22:41         ` Suzuki K Poulose
2021-02-02 22:41           ` Suzuki K Poulose
2021-02-04 12:27           ` Mike Leach
2021-02-04 12:27             ` Mike Leach
2021-02-02 16:37       ` Mathieu Poirier
2021-02-02 16:37         ` Mathieu Poirier
2021-01-27  8:55 ` [PATCH V3 02/14] coresight: Do not scan for graph if none is present Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-01 23:44   ` Mathieu Poirier
2021-02-01 23:44     ` Mathieu Poirier
2021-02-02 11:10   ` Mike Leach
2021-02-02 11:10     ` Mike Leach
2021-02-02 14:36     ` Suzuki K Poulose
2021-02-02 14:36       ` Suzuki K Poulose
2021-01-27  8:55 ` [PATCH V3 03/14] coresight: etm4x: Add support for PE OS lock Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-02 17:40   ` Mathieu Poirier
2021-02-02 17:40     ` Mathieu Poirier
2021-02-02 18:03   ` Mathieu Poirier
2021-02-02 18:03     ` Mathieu Poirier
2021-02-15 14:08   ` Mike Leach
2021-02-15 14:08     ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 04/14] coresight: ete: Add support for ETE sysreg access Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-02 17:52   ` Mathieu Poirier
2021-02-02 17:52     ` Mathieu Poirier
2021-02-03 15:51     ` Suzuki K Poulose
2021-02-03 15:51       ` Suzuki K Poulose
2021-02-15 14:08   ` Mike Leach
2021-02-15 14:08     ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 05/14] coresight: ete: Add support for ETE tracing Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-02 18:56   ` Mathieu Poirier
2021-02-02 18:56     ` Mathieu Poirier
2021-02-02 22:50     ` Suzuki K Poulose
2021-02-02 22:50       ` Suzuki K Poulose
2021-02-15 13:21     ` Mike Leach
2021-02-15 13:21       ` Mike Leach
2021-02-15 14:08       ` Mike Leach
2021-02-15 14:08         ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 06/14] dts: bindings: Document device tree bindings for ETE Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-09 19:00   ` Rob Herring
2021-02-09 19:00     ` Rob Herring
2021-02-10 12:33     ` Suzuki K Poulose
2021-02-10 12:33       ` Suzuki K Poulose
2021-02-18 18:33       ` Rob Herring
2021-02-18 18:33         ` Rob Herring
2021-02-18 22:51         ` Suzuki K Poulose
2021-02-18 22:51           ` Suzuki K Poulose
2021-01-27  8:55 ` [PATCH V3 07/14] coresight: etm-perf: Handle stale output handles Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-03 19:05   ` Mathieu Poirier
2021-02-03 19:05     ` Mathieu Poirier
2021-02-03 23:36     ` Suzuki K Poulose
2021-02-03 23:36       ` Suzuki K Poulose
2021-02-15 16:27   ` Mike Leach
2021-02-15 16:27     ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 08/14] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-01-28  9:16   ` Suzuki K Poulose
2021-01-28  9:16     ` Suzuki K Poulose
2021-02-04 18:34     ` Mathieu Poirier
2021-02-04 18:34       ` Mathieu Poirier
2021-02-16 10:40       ` Anshuman Khandual
2021-02-16 10:40         ` Anshuman Khandual
2021-02-16 20:44         ` Mathieu Poirier
2021-02-16 20:44           ` Mathieu Poirier
2021-02-16 10:21     ` Anshuman Khandual
2021-02-16 10:21       ` Anshuman Khandual
2021-02-15 16:27   ` Mike Leach
2021-02-15 16:27     ` Mike Leach
2021-02-15 16:56     ` Mathieu Poirier
2021-02-15 16:56       ` Mathieu Poirier
2021-02-15 17:58       ` Mike Leach
2021-02-15 17:58         ` Mike Leach
2021-02-16 20:30         ` Mathieu Poirier
2021-02-16 20:30           ` Mathieu Poirier
2021-01-27  8:55 ` [PATCH V3 09/14] arm64: Add TRBE definitions Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-01-28  9:31   ` Suzuki K Poulose
2021-01-28  9:31     ` Suzuki K Poulose
2021-01-28 17:18   ` Catalin Marinas
2021-01-28 17:18     ` Catalin Marinas
2021-02-15 18:06     ` Mike Leach
2021-02-15 18:06       ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 10/14] arm64: nvhe: Allow TRBE access at EL1 Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-01-27  9:58   ` Marc Zyngier
2021-01-27  9:58     ` Marc Zyngier
2021-01-28  9:34     ` Suzuki K Poulose [this message]
2021-01-28  9:34       ` Suzuki K Poulose
2021-01-28  9:46       ` Marc Zyngier
2021-01-28  9:46         ` Marc Zyngier
2021-01-28  9:48         ` Suzuki K Poulose
2021-01-28  9:48           ` Suzuki K Poulose
2021-01-27  8:55 ` [PATCH V3 11/14] coresight: sink: Add TRBE driver Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-01-29 10:23   ` Suzuki K Poulose
2021-02-02  5:55     ` Anshuman Khandual
2021-02-02  5:55       ` Anshuman Khandual
2021-02-05 17:53   ` Mathieu Poirier
2021-02-05 17:53     ` Mathieu Poirier
2021-02-08  4:20     ` Anshuman Khandual
2021-02-08  4:20       ` Anshuman Khandual
2021-02-09 17:39     ` Mathieu Poirier
2021-02-09 17:39       ` Mathieu Poirier
2021-02-10  4:12       ` Anshuman Khandual
2021-02-10  4:12         ` Anshuman Khandual
2021-02-10 16:54         ` Mathieu Poirier
2021-02-10 16:54           ` Mathieu Poirier
2021-02-10 19:00   ` Mathieu Poirier
2021-02-10 19:00     ` Mathieu Poirier
2021-02-12  5:43     ` Anshuman Khandual
2021-02-12  5:43       ` Anshuman Khandual
2021-02-12 17:02       ` Mathieu Poirier
2021-02-12 17:02         ` Mathieu Poirier
2021-02-11 19:00   ` Mathieu Poirier
2021-02-11 19:00     ` Mathieu Poirier
2021-02-12  3:31     ` Anshuman Khandual
2021-02-12  3:31       ` Anshuman Khandual
2021-02-12 16:57       ` Mathieu Poirier
2021-02-12 16:57         ` Mathieu Poirier
2021-02-15  9:26         ` Anshuman Khandual
2021-02-15  9:26           ` Anshuman Khandual
2021-02-12 20:26   ` Mathieu Poirier
2021-02-12 20:26     ` Mathieu Poirier
2021-02-15  9:46     ` Anshuman Khandual
2021-02-15  9:46       ` Anshuman Khandual
2021-02-16  9:00       ` Mike Leach
2021-02-16  9:00         ` Mike Leach
2021-02-16  9:44         ` Anshuman Khandual
2021-02-16  9:44           ` Anshuman Khandual
2021-02-16 12:12           ` Mike Leach
2021-02-16 12:12             ` Mike Leach
2021-02-18  7:50         ` Suzuki K Poulose
2021-02-18  7:50           ` Suzuki K Poulose
2021-02-18 14:30           ` Mike Leach
2021-02-18 14:30             ` Mike Leach
2021-02-18 15:14             ` Suzuki K Poulose
2021-02-18 15:14               ` Suzuki K Poulose
2021-02-22 10:42               ` Mike Leach
2021-02-22 10:42                 ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 12/14] dts: bindings: Document device tree bindings for Arm TRBE Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-02-09 19:04   ` Rob Herring
2021-02-09 19:04     ` Rob Herring
2021-01-27  8:55 ` [PATCH V3 13/14] perf: aux: Add flags for the buffer format Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-01-27 12:51   ` Peter Zijlstra
2021-01-27 12:51     ` Peter Zijlstra
2021-02-16 10:59   ` Mike Leach
2021-02-16 10:59     ` Mike Leach
2021-01-27  8:55 ` [PATCH V3 14/14] coresight: etm-perf: Add support for trace " Anshuman Khandual
2021-01-27  8:55   ` Anshuman Khandual
2021-01-27 12:54   ` Peter Zijlstra
2021-01-27 12:54     ` Peter Zijlstra
2021-01-27 13:00     ` Al Grant
2021-01-27 13:00       ` Al Grant
2021-02-18  3:05       ` Anshuman Khandual
2021-02-18  3:05         ` Anshuman Khandual
2021-01-27 14:12     ` Suzuki K Poulose
2021-01-27 14:12       ` Suzuki K Poulose
2021-02-16 11:01   ` Mike Leach
2021-02-16 11:01     ` Mike Leach
2021-01-27 18:50 ` [PATCH V3 00/14] arm64: coresight: Enable ETE and TRBE Mathieu Poirier
2021-01-27 18:50   ` Mathieu Poirier
2021-02-01 18:44 ` Mathieu Poirier
2021-02-01 18:44   ` Mathieu Poirier
2021-02-18  4:23   ` Anshuman Khandual
2021-02-18  4:23     ` Anshuman Khandual

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