From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A64FDC48BD1 for ; Fri, 11 Jun 2021 10:10:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7FAC9613E7 for ; Fri, 11 Jun 2021 10:10:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231266AbhFKKMS (ORCPT ); Fri, 11 Jun 2021 06:12:18 -0400 Received: from foss.arm.com ([217.140.110.172]:53808 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229480AbhFKKMR (ORCPT ); Fri, 11 Jun 2021 06:12:17 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2C5F91396; Fri, 11 Jun 2021 03:10:19 -0700 (PDT) Received: from [192.168.1.179] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F23CC3F694; Fri, 11 Jun 2021 03:10:17 -0700 (PDT) Subject: Re: [PATCH] modified: gpu/drm/panfrost/panfrost_gpu.c To: Chunyou Tang Cc: tangchunyou , tomeu.vizoso@collabora.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, alyssa.rosenzweig@collabora.com, tangchunyou@icubecorp.cn References: <20210609063850.2060-1-tangchunyou@163.com> <78a2488a-71d5-548a-e221-7786f788509c@arm.com> <20210610210659.00003155@163.com> From: Steven Price Message-ID: Date: Fri, 11 Jun 2021 11:10:16 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210610210659.00003155@163.com> Content-Type: text/plain; charset=gb18030 Content-Language: en-GB Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/06/2021 14:06, Chunyou Tang wrote: > Hi Steven, Hi Chunyou, For some reason I'm not directly receiving your emails (only via the list) - can you double check your email configuration? >>> The GPU exception fault status register(0x3C),the low 8 bit is the >>> EXCEPTION_TYPE.We can see the description at P3-78 in spec. > > You can see the spec > . Thanks - please include that in the commit message - there are many TRMs (one for each GPU) so without the information about exactly which specification the page number is pretty useless. Sadly this documentation isn't public which would be even better but I don't think there are any public specs for this information. >> However this change is correct - panfrost_exception_name() should be >> taking only the lower 8 bits. Even better though would be to to report >> the full raw fault information as well as the high bits can contain >> useful information: >> >> dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", >> fault_status, >> panfrost_exception_name(pfdev, fault_status & 0xFF), >> address); > > So I change it according to what you said? Yes, please send a v2. Thanks, Steve > ÓÚ Thu, 10 Jun 2021 11:41:52 +0100 > Steven Price дµÀ: > >> The subject should have the prefix "drm/panfrost" and should mention >> what the patch is changing (not just the filename). >> >> On 09/06/2021 07:38, ChunyouTang wrote: >>> From: tangchunyou >>> >>> The GPU exception fault status register(0x3C),the low 8 bit is the >>> EXCEPTION_TYPE.We can see the description at P3-78 in spec. >> >> Nit: When referring to a spec it's always good to mention the name - >> I'm not sure which specification you found this in. >> >>> >>> Signed-off-by: tangchunyou >>> --- >>> drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c >>> b/drivers/gpu/drm/panfrost/panfrost_gpu.c index >>> 2aae636f1cf5..1fffb6a0b24f 100644 --- >>> a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ >>> b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -33,7 +33,7 @@ static >>> irqreturn_t panfrost_gpu_irq_handler(int irq, void *data) address >>> |= gpu_read(pfdev, GPU_FAULT_ADDRESS_LO); >>> dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at >>> 0x%016llx\n", >>> - fault_status & 0xFF, >>> panfrost_exception_name(pfdev, fault_status), >>> + fault_status & 0xFF, >>> panfrost_exception_name(pfdev, fault_status & 0xFF), >> >> However this change is correct - panfrost_exception_name() should be >> taking only the lower 8 bits. Even better though would be to to report >> the full raw fault information as well as the high bits can contain >> useful information: >> >> dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", >> fault_status, >> panfrost_exception_name(pfdev, fault_status & 0xFF), >> address); >> >> Thanks, >> >> Steve >> >>> address); >>> >>> if (state & GPU_IRQ_MULTIPLE_FAULT) >>> > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53224C48BE5 for ; Fri, 11 Jun 2021 10:10:22 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F5AA613E7 for ; Fri, 11 Jun 2021 10:10:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F5AA613E7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 647806EE64; Fri, 11 Jun 2021 10:10:21 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 046C96EE64 for ; Fri, 11 Jun 2021 10:10:20 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2C5F91396; Fri, 11 Jun 2021 03:10:19 -0700 (PDT) Received: from [192.168.1.179] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F23CC3F694; Fri, 11 Jun 2021 03:10:17 -0700 (PDT) Subject: Re: [PATCH] modified: gpu/drm/panfrost/panfrost_gpu.c To: Chunyou Tang References: <20210609063850.2060-1-tangchunyou@163.com> <78a2488a-71d5-548a-e221-7786f788509c@arm.com> <20210610210659.00003155@163.com> From: Steven Price Message-ID: Date: Fri, 11 Jun 2021 11:10:16 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210610210659.00003155@163.com> Content-Type: text/plain; charset=gb18030 Content-Language: en-GB Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tomeu.vizoso@collabora.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, alyssa.rosenzweig@collabora.com, tangchunyou , tangchunyou@icubecorp.cn Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 10/06/2021 14:06, Chunyou Tang wrote: > Hi Steven, Hi Chunyou, For some reason I'm not directly receiving your emails (only via the list) - can you double check your email configuration? >>> The GPU exception fault status register(0x3C),the low 8 bit is the >>> EXCEPTION_TYPE.We can see the description at P3-78 in spec. > > You can see the spec > . Thanks - please include that in the commit message - there are many TRMs (one for each GPU) so without the information about exactly which specification the page number is pretty useless. Sadly this documentation isn't public which would be even better but I don't think there are any public specs for this information. >> However this change is correct - panfrost_exception_name() should be >> taking only the lower 8 bits. Even better though would be to to report >> the full raw fault information as well as the high bits can contain >> useful information: >> >> dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", >> fault_status, >> panfrost_exception_name(pfdev, fault_status & 0xFF), >> address); > > So I change it according to what you said? Yes, please send a v2. Thanks, Steve > ÓÚ Thu, 10 Jun 2021 11:41:52 +0100 > Steven Price дµÀ: > >> The subject should have the prefix "drm/panfrost" and should mention >> what the patch is changing (not just the filename). >> >> On 09/06/2021 07:38, ChunyouTang wrote: >>> From: tangchunyou >>> >>> The GPU exception fault status register(0x3C),the low 8 bit is the >>> EXCEPTION_TYPE.We can see the description at P3-78 in spec. >> >> Nit: When referring to a spec it's always good to mention the name - >> I'm not sure which specification you found this in. >> >>> >>> Signed-off-by: tangchunyou >>> --- >>> drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c >>> b/drivers/gpu/drm/panfrost/panfrost_gpu.c index >>> 2aae636f1cf5..1fffb6a0b24f 100644 --- >>> a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ >>> b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -33,7 +33,7 @@ static >>> irqreturn_t panfrost_gpu_irq_handler(int irq, void *data) address >>> |= gpu_read(pfdev, GPU_FAULT_ADDRESS_LO); >>> dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at >>> 0x%016llx\n", >>> - fault_status & 0xFF, >>> panfrost_exception_name(pfdev, fault_status), >>> + fault_status & 0xFF, >>> panfrost_exception_name(pfdev, fault_status & 0xFF), >> >> However this change is correct - panfrost_exception_name() should be >> taking only the lower 8 bits. Even better though would be to to report >> the full raw fault information as well as the high bits can contain >> useful information: >> >> dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", >> fault_status, >> panfrost_exception_name(pfdev, fault_status & 0xFF), >> address); >> >> Thanks, >> >> Steve >> >>> address); >>> >>> if (state & GPU_IRQ_MULTIPLE_FAULT) >>> > >