From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jon Hunter Subject: Re: [RFC PATCH v2 1/1] drm/tegra: sor: Fix hang on tegra124 due to NULL clk_out Date: Tue, 2 Jan 2018 18:32:11 +0000 Message-ID: References: <0f776b7500ee0e74b316b9803803b309779d2ff7.1513768618.git.guillaume.tucker@collabora.com> <20171220181520.GA9687@ulmo> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20171220181520.GA9687@ulmo> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Thierry Reding , Guillaume Tucker Cc: David Airlie , Peter De Schrijver , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, Thierry Reding List-Id: linux-tegra@vger.kernel.org Ck9uIDIwLzEyLzE3IDE4OjE1LCBUaGllcnJ5IFJlZGluZyB3cm90ZToKPiBPbiBXZWQsIERlYyAy MCwgMjAxNyBhdCAxMTozMjoyM0FNICswMDAwLCBHdWlsbGF1bWUgVHVja2VyIHdyb3RlOgo+PiBX aGVuIG5laXRoZXIgSERNSSBub3IgRFAgaXMgc3VwcG9ydGVkIHN1Y2ggYXMgb24gdGhlIHRlZ3Jh MTI0LCB0aGUKPj4gc29yLT5jbGtfb3V0IGlzIG5vdCBpbml0aWFsaXNlZCBhbmQgcmVtYWlucyBO VUxMLiAgSW4gdGhpcyBjYXNlLCB0aGUKPj4gcGFyZW50IGNsb2NrIGNhbid0IGJlIGFzc2lnbmVk IHRvIGl0IHNvIHJldmVydCB0byB0aGUgcHJldmlvdXMKPj4gYmVoYXZpb3VyIG9mIGFzc2lnbmlu ZyBpdCB0byB0aGUgbWFpbiBzb3ItPmNsayBpbnN0ZWFkLgo+Pgo+PiBUaGlzIGZpeGVzIGEga2Vy bmVsIGhhbmcgb24gdGVncmExMjQgYW5kIHNob3VsZCBhbHNvIGFmZmVjdCB0ZWdyYTIxMAo+PiBh cyB0aGV5IGJvdGggZG9uJ3Qgc3VwcG9ydCBIRE1JIGFuZCBEUC4gIFRlc3RlZCBvbiB0ZWdyYTEy NCBvbmx5Lgo+Pgo+PiBGaXhlczogZTEzMzVlMmYwY2ZjICgiZHJtL3RlZ3JhOiBzb3I6IFJlaW1w bGVtZW50IHBhZCBjbG9jayIpCj4+IFNpZ25lZC1vZmYtYnk6IEd1aWxsYXVtZSBUdWNrZXIgPGd1 aWxsYXVtZS50dWNrZXJAY29sbGFib3JhLmNvbT4KPj4gQ0M6IFRoaWVycnkgUmVkaW5nIDx0cmVk aW5nQG52aWRpYS5jb20+Cj4+IC0tLQo+PiAgZHJpdmVycy9ncHUvZHJtL3RlZ3JhL3Nvci5jIHwg MiArLQo+PiAgMSBmaWxlIGNoYW5nZWQsIDEgaW5zZXJ0aW9uKCspLCAxIGRlbGV0aW9uKC0pCj4g Cj4gSG93IGFib3V0IGp1c3QgdGhlIGJlbG93IGluc3RlYWQ/IEl0J3Mgb25lIG1vcmUgbGluZSB0 aGFuIHlvdXIgcGF0Y2gsCj4gYnV0IGl0IHdpbGwgYXV0b21hdGljYWxseSBoYW5kbGUgYWxsIG9j Y3VycmVuY2VzIG9mIGNsa19vdXQgcHJvcGVybHkuCj4gCj4gLS0tID44IC0tLQo+IGRpZmYgLS1n aXQgYS9kcml2ZXJzL2dwdS9kcm0vdGVncmEvc29yLmMgYi9kcml2ZXJzL2dwdS9kcm0vdGVncmEv c29yLmMKPiBpbmRleCBmNjMxM2M0ZDYxMmUuLjRiZTllZGY5YzZmZSAxMDA2NDQKPiAtLS0gYS9k cml2ZXJzL2dwdS9kcm0vdGVncmEvc29yLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vdGVncmEv c29yLmMKPiBAQCAtMzA0Nyw2ICszMDQ3LDggQEAgc3RhdGljIGludCB0ZWdyYV9zb3JfcHJvYmUo c3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgIG5hbWUsIGVycik7Cj4gICAgICAgICAgICAgICAgICAgICAgICAgZ290byByZW1vdmU7 Cj4gICAgICAgICAgICAgICAgIH0KPiArICAgICAgIH0gZWxzZSB7Cj4gKyAgICAgICAgICAgICAg IHNvci0+Y2xrX291dCA9IHNvci0+Y2xrOwo+ICAgICAgICAgfQo+ICAKPiAgICAgICAgIHNvci0+ Y2xrX3BhcmVudCA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAicGFyZW50Iik7Cj4gLS0tID44 IC0tLQo+IAo+IFRoYXQgc2FpZCwgSSBzdXNwZWN0IHRoZSBTT1IgbWlnaHQgYmUgY29tcGF0aWJs ZSBmcm9tIGEgY2xvY2sgcG9pbnQgb2YKPiB2aWV3IHdpdGggbGF0ZXIgdmVyc2lvbnMgYW5kIHBl cmhhcHMgd2UganVzdCBkaWRuJ3QgaW1wbGVtZW50IGNsb2Nrcwo+IGNvcnJlY3RseSBiYWNrIGlu IHRoZSBUZWdyYTEyNCB0aW1lZnJhbWUuCj4gCj4gTWF5YmUgUGV0ZXIga25vd3MuCgpTbyB0aGUg YWJvdmUgY2hhbmdlIGZyb20gVGhpZXJyeSB3b3JrcyBmb3IgbWUgYW5kIHdlIG5lZWQgdGhpcyBm b3IgdjQuMTUKKG90aGVyd2lzZSBueWFuLWJpZyBkb2VzIG5vdCBib290KSBzbyB5b3UgY2FuIGhh dmUgbXkgLi4uCgpUZXN0ZWQtYnk6IEpvbiBIdW50ZXIgPGpvbmF0aGFuaEBudmlkaWEuY29tPgoK SG93ZXZlciwgd291bGQgYmUgZ29vZCB0byBoYXZlIFBldGVyJ3MgQUNLLCBlc3BlY2lhbGx5IHNl ZWluZyB0aGF0ClRlZ3JhMjEwIHNvcjAgZG9lcyBub3Qgc3VwcG9ydCBIRE1JIGFuZCBEUC4gU28g d2UgbmVlZCB0byBtYWtlIHN1cmUgdGhpcwppcyBjb3JyZWN0IGZvciBUZWdyYTIxMCBhcyB3ZWxs IChhbHRob3VnaCBJIGhhdmUgbm90IHNlZW4gYW55CnJlZ3Jlc3Npb25zIGZvciBUZWdyYTIxMCku CgpDaGVlcnMKSm9uCgotLSAKbnZwdWJsaWMKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMu ZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlz dGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751421AbeABScT (ORCPT + 1 other); Tue, 2 Jan 2018 13:32:19 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:8851 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751029AbeABScR (ORCPT ); Tue, 2 Jan 2018 13:32:17 -0500 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 02 Jan 2018 10:32:17 -0800 Subject: Re: [RFC PATCH v2 1/1] drm/tegra: sor: Fix hang on tegra124 due to NULL clk_out To: Thierry Reding , Guillaume Tucker , Peter De Schrijver CC: Thierry Reding , Peter De Schrijver , David Airlie , , , References: <0f776b7500ee0e74b316b9803803b309779d2ff7.1513768618.git.guillaume.tucker@collabora.com> <20171220181520.GA9687@ulmo> From: Jon Hunter Message-ID: Date: Tue, 2 Jan 2018 18:32:11 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20171220181520.GA9687@ulmo> X-Originating-IP: [10.21.132.149] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 20/12/17 18:15, Thierry Reding wrote: > On Wed, Dec 20, 2017 at 11:32:23AM +0000, Guillaume Tucker wrote: >> When neither HDMI nor DP is supported such as on the tegra124, the >> sor->clk_out is not initialised and remains NULL. In this case, the >> parent clock can't be assigned to it so revert to the previous >> behaviour of assigning it to the main sor->clk instead. >> >> This fixes a kernel hang on tegra124 and should also affect tegra210 >> as they both don't support HDMI and DP. Tested on tegra124 only. >> >> Fixes: e1335e2f0cfc ("drm/tegra: sor: Reimplement pad clock") >> Signed-off-by: Guillaume Tucker >> CC: Thierry Reding >> --- >> drivers/gpu/drm/tegra/sor.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) > > How about just the below instead? It's one more line than your patch, > but it will automatically handle all occurrences of clk_out properly. > > --- >8 --- > diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c > index f6313c4d612e..4be9edf9c6fe 100644 > --- a/drivers/gpu/drm/tegra/sor.c > +++ b/drivers/gpu/drm/tegra/sor.c > @@ -3047,6 +3047,8 @@ static int tegra_sor_probe(struct platform_device *pdev) > name, err); > goto remove; > } > + } else { > + sor->clk_out = sor->clk; > } > > sor->clk_parent = devm_clk_get(&pdev->dev, "parent"); > --- >8 --- > > That said, I suspect the SOR might be compatible from a clock point of > view with later versions and perhaps we just didn't implement clocks > correctly back in the Tegra124 timeframe. > > Maybe Peter knows. So the above change from Thierry works for me and we need this for v4.15 (otherwise nyan-big does not boot) so you can have my ... Tested-by: Jon Hunter However, would be good to have Peter's ACK, especially seeing that Tegra210 sor0 does not support HDMI and DP. So we need to make sure this is correct for Tegra210 as well (although I have not seen any regressions for Tegra210). Cheers Jon -- nvpublic