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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id b14sm7771612pjo.44.2021.10.28.09.54.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Oct 2021 09:54:31 -0700 (PDT) Subject: Re: [PULL 00/18] riscv-to-apply queue To: Alistair Francis , qemu-devel@nongnu.org References: <20211028044342.3070385-1-alistair.francis@opensource.wdc.com> From: Richard Henderson Message-ID: Date: Thu, 28 Oct 2021 09:54:29 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211028044342.3070385-1-alistair.francis@opensource.wdc.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -48 X-Spam_score: -4.9 X-Spam_bar: ---- X-Spam_report: (-4.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.847, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/27/21 9:43 PM, Alistair Francis wrote: > From: Alistair Francis > > The following changes since commit c52d69e7dbaaed0ffdef8125e79218672c30161d: > > Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20211027' into staging (2021-10-27 11:45:18 -0700) > > are available in the Git repository at: > > git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20211028 > > for you to fetch changes up to 344b61e1478c8eb37e81b96f63d8f5071f5a38e1: > > target/riscv: remove force HS exception (2021-10-28 14:39:23 +1000) > > ---------------------------------------------------------------- > Fifth RISC-V PR for QEMU 6.2 > > - Use a shared PLIC config helper function > - Fixup the OpenTitan PLIC configuration > - Add support for the experimental J extension > - Update the fmin/fmax handling > - Fixup VS interrupt forwarding For avoidance of doubt, I'll wait for an ack from Alistair, whether or not he wants to update the two min/max patches to Frank's final version. The code appears to be the same between v4 and v5, but the commit comments are improved, so this is not something that could be fixed with a second patch. r~