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References: <20170207005930.28327-1-laurent@vivier.eu>
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From: Richard Henderson <rth@twiddle.net>
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Date: Thu, 16 Feb 2017 12:36:13 +1100
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Subject: Re: [Qemu-devel] [PATCH v3 13/16] target-m68k: add fsglmul and
 fsgldiv
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To: Laurent Vivier <laurent@vivier.eu>, qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>

On 02/07/2017 11:59 AM, Laurent Vivier wrote:
> fsglmul and fsgldiv truncate data to single precision before computing
> results.
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
>  target/m68k/fpu_helper.c | 22 ++++++++++++++++++++++
>  target/m68k/helper.h     |  2 ++
>  target/m68k/translate.c  |  8 ++++++++
>  3 files changed, 32 insertions(+)
>
> diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
> index 42f5b5c..8a3eed3 100644
> --- a/target/m68k/fpu_helper.c
> +++ b/target/m68k/fpu_helper.c
> @@ -351,6 +351,17 @@ void HELPER(mul_FP0_FP1)(CPUM68KState *env)
>      floatx80_to_FP0(env, res);
>  }
>
> +void HELPER(sglmul_FP0_FP1)(CPUM68KState *env)
> +{
> +    float64 a, b, res;
> +
> +    a = floatx80_to_float64(FP0_to_floatx80(env), &env->fp_status);
> +    b = floatx80_to_float64(FP1_to_floatx80(env), &env->fp_status);

s/float64/float32/g

Kinda sorta, probably close enough.  The manual says the resulting exponent may 
be out of range.  Which means this will produce +Inf in cases HW won't.


r~