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From: Vladimir Murzin <vladimir.murzin@arm.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Russell King - ARM Linux <linux@armlinux.org.uk>,
	Mark Rutland <mark.rutland@arm.com>,
	Marc Zyngier <maz@kernel.org>, Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER
Date: Wed, 1 Dec 2021 15:51:19 +0000	[thread overview]
Message-ID: <d363b689-3643-9106-7caa-32de7610cc2d@arm.com> (raw)
In-Reply-To: <CAK8P3a2R0s-b-n_2WfEYuWUmhSXz0qOH_oq0QekxaFJWo1mfpg@mail.gmail.com>

On 12/1/21 3:13 PM, Arnd Bergmann wrote:
> On Wed, Dec 1, 2021 at 3:15 PM Vladimir Murzin <vladimir.murzin@arm.com> wrote:
>> On 12/1/21 2:05 PM, Arnd Bergmann wrote:
>>>
>>> Yes, I saw that, but I'm not too worried about this on Arm, as we don't
>>> support that combination (SMP without MMU) in any of our platforms or
>>> in Kconfig without additional patches.
>>
>> That's true, yet it seems to be broken for other arches which seems to be
>> supported (w/o additional patches?)
> 
> Sure, it should get fixed, it's just not on my list of high-priority problems.
> For j2, I think there isn't much work going on at the moment, and I think
> there are other problems on sh nommu smp. For riscv K210, I think there
> isn't as much interest any more after MMU-based platforms are becoming
> more available.
> 
>>> What target are you actually testing on?
>>>
>>
>> It is MPS3 board with range of FPGA images. M and R class supported yet
>> AN536 (Cortex-R52x2) has issues which prevents it using in SMP; recent
>> images for M class require new timer (which is WIP).
>>
>> I also have access to Fast Models - they are easier and quicker to test
>> and do not require visiting office :)
> 
> Ok, I see. What are your plans for the Cortex-R support? My impression
> was that there isn't really much interest in upstream support as there is
> no commercial SoC platform using 32-bit Cortex-R that makes sense to
> run Linux on (any more), and Cortex-R82 would run with MMU enabled.
> Do you expect this to change in the future?

There are not many patches to make Linux run on Cortex-R - it is mostly to
undo multiplform, so I'm fine keeping them downstream.

I cannot say how much interest in running Linux with 32-bit Cortex-R, yet
occasionally people ask me how to do that (the same applies to M-class).

> 
> As far as I can tell, there is no SMP-capable Cortex-M. If there is,
> then Ard's THREAD_INFO_IN_TASK series may have another problem
> because of the lack of the TPIDRURO register. Again, I'm not too
> worried about that because mainline Linux does not support this
> configuration, but it's something to keep in mind.

I'm not aware of any SMP-capable Cortex-M either :)

Cheers
Vladimir

> 
>          Arnd
> 


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  reply	other threads:[~2021-12-01 15:52 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 11:02 [PATCH 1/2] irqchip: nvic: Fix offset for Interrupt Priority Offsets Vladimir Murzin
2021-12-01 11:02 ` [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER Vladimir Murzin
2021-12-01 11:58   ` Mark Rutland
2021-12-01 12:30   ` Arnd Bergmann
2021-12-01 13:43     ` Vladimir Murzin
2021-12-01 14:05       ` Arnd Bergmann
2021-12-01 14:15         ` Vladimir Murzin
2021-12-01 15:13           ` Arnd Bergmann
2021-12-01 15:51             ` Vladimir Murzin [this message]
2021-12-02  8:35     ` Ard Biesheuvel
2021-12-02  9:05       ` Marc Zyngier
2021-12-02  9:23       ` Arnd Bergmann
2021-12-02  9:33         ` Vladimir Murzin
2021-12-02  9:45           ` Arnd Bergmann
2021-12-02 11:05             ` Ard Biesheuvel
2021-12-02 14:12               ` Vladimir Murzin
2021-12-02 16:46                 ` Ard Biesheuvel
2021-12-02 18:02                   ` Vladimir Murzin
2021-12-02 18:38                     ` Ard Biesheuvel
2021-12-02 20:27                       ` Jesse Taube
2021-12-02  9:31   ` Marc Zyngier
2021-12-02  9:32 ` [irqchip: irq/irqchip-fixes] irqchip: nvic: Fix offset for Interrupt Priority Offsets irqchip-bot for Vladimir Murzin

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