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Received: from host86-130-37-216.range86-130.btcentralplus.com ([86.130.37.216] helo=[10.8.0.6]) by mail.ilande.co.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1q4dEh-0004Td-3a; Thu, 01 Jun 2023 09:00:47 +0100 Message-ID: Date: Thu, 1 Jun 2023 09:00:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 To: Markus Armbruster , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Cc: laurent@vivier.eu, qemu-devel@nongnu.org References: <20230531125400.288917-1-mark.cave-ayland@ilande.co.uk> <20230531125400.288917-6-mark.cave-ayland@ilande.co.uk> <92959cb6-5539-17ef-4fbf-f54cefe7d0cb@linaro.org> <87jzwoczq6.fsf@pond.sub.org> Content-Language: en-US From: Mark Cave-Ayland In-Reply-To: <87jzwoczq6.fsf@pond.sub.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 86.130.37.216 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: Re: [PATCH v2 05/23] q800: move CPU object into Q800MachineState X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.ilande.co.uk) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.ilande.co.uk X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 31/05/2023 16:00, Markus Armbruster wrote: > Philippe Mathieu-Daudé writes: > >> On 31/5/23 14:53, Mark Cave-Ayland wrote: >>> Also change the instantiation of the CPU to use object_initialize_child() >>> followed by a separate realisation. >>> Signed-off-by: Mark Cave-Ayland >>> --- >>> hw/m68k/q800.c | 13 ++++++++----- >>> include/hw/m68k/q800.h | 2 ++ >>> 2 files changed, 10 insertions(+), 5 deletions(-) >>> diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c >>> index 3730b30dd1..c34b2548ca 100644 >>> --- a/hw/m68k/q800.c >>> +++ b/hw/m68k/q800.c >>> @@ -364,7 +364,7 @@ static uint8_t fake_mac_rom[] = { >>> static void q800_machine_init(MachineState *machine) >>> { >>> - M68kCPU *cpu = NULL; >>> + Q800MachineState *m = Q800_MACHINE(machine); >>> int linux_boot; >>> int32_t kernel_size; >>> uint64_t elf_entry; >>> @@ -407,8 +407,10 @@ static void q800_machine_init(MachineState *machine) >>> } >>> /* init CPUs */ >>> - cpu = M68K_CPU(cpu_create(machine->cpu_type)); >>> - qemu_register_reset(main_cpu_reset, cpu); >>> + object_initialize_child(OBJECT(machine), "cpu", &m->cpu, >>> + M68K_CPU_TYPE_NAME("m68040")); >>> + object_property_set_bool(OBJECT(&m->cpu), "realized", true, &error_fatal); >> >> CPUs are QDev-based, shouldn't we use qdev_realize()? > > Yes, we should. > > [...] Interesting. I remember thinking that CPUs were different, so I'm fairly sure I borrowed this from some similar code in hw/arm :) Shouldn't the above be directly equivalent to qdev_realize(dev, NULL, &error_fatal) given that the CPU doesn't connect to a bus? ATB, Mark.