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* [PATCH v2] Hexagon (target/hexagon) Fix shift amount check in fASHIFTL/fLSHIFTR
@ 2021-03-04 17:37 Taylor Simpson
  2021-03-05 19:01 ` Richard Henderson
  0 siblings, 1 reply; 2+ messages in thread
From: Taylor Simpson @ 2021-03-04 17:37 UTC (permalink / raw)
  To: qemu-devel; +Cc: ale, bcain, peter.maydell, richard.henderson, tsimpson, philmd

Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros")
Eliminate the following Coverity CIDs (Bad bit shift operation)
    325227
    325292
    325425
    325526
    325561
    325564
    325578
    325637
    325736
    325748
    325786
    325815
    325837

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/macros.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
index 78c4efb..cfcb817 100644
--- a/target/hexagon/macros.h
+++ b/target/hexagon/macros.h
@@ -459,7 +459,7 @@ static inline void gen_logical_not(TCGv dest, TCGv src)
                    : (fCAST##REGSTYPE##s(SRC) >> (SHAMT)))
 #define fASHIFTR(SRC, SHAMT, REGSTYPE) (fCAST##REGSTYPE##s(SRC) >> (SHAMT))
 #define fLSHIFTR(SRC, SHAMT, REGSTYPE) \
-    (((SHAMT) >= 64) ? 0 : (fCAST##REGSTYPE##u(SRC) >> (SHAMT)))
+    (((SHAMT) >= (sizeof(SRC) * 8)) ? 0 : (fCAST##REGSTYPE##u(SRC) >> (SHAMT)))
 #define fROTL(SRC, SHAMT, REGSTYPE) \
     (((SHAMT) == 0) ? (SRC) : ((fCAST##REGSTYPE##u(SRC) << (SHAMT)) | \
                               ((fCAST##REGSTYPE##u(SRC) >> \
@@ -469,7 +469,7 @@ static inline void gen_logical_not(TCGv dest, TCGv src)
                               ((fCAST##REGSTYPE##u(SRC) << \
                                  ((sizeof(SRC) * 8) - (SHAMT))))))
 #define fASHIFTL(SRC, SHAMT, REGSTYPE) \
-    (((SHAMT) >= 64) ? 0 : (fCAST##REGSTYPE##s(SRC) << (SHAMT)))
+    (((SHAMT) >= (sizeof(SRC) * 8)) ? 0 : (fCAST##REGSTYPE##s(SRC) << (SHAMT)))
 
 #ifdef QEMU_GENERATE
 #define fLOAD(NUM, SIZE, SIGN, EA, DST) MEM_LOAD##SIZE##SIGN(DST, EA)
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v2] Hexagon (target/hexagon) Fix shift amount check in fASHIFTL/fLSHIFTR
  2021-03-04 17:37 [PATCH v2] Hexagon (target/hexagon) Fix shift amount check in fASHIFTL/fLSHIFTR Taylor Simpson
@ 2021-03-05 19:01 ` Richard Henderson
  0 siblings, 0 replies; 2+ messages in thread
From: Richard Henderson @ 2021-03-05 19:01 UTC (permalink / raw)
  To: Taylor Simpson, qemu-devel; +Cc: ale, peter.maydell, philmd, bcain

On 3/4/21 9:37 AM, Taylor Simpson wrote:
> Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros")
> Eliminate the following Coverity CIDs (Bad bit shift operation)
>      325227
>      325292
>      325425
>      325526
>      325561
>      325564
>      325578
>      325637
>      325736
>      325748
>      325786
>      325815
>      325837
> 
> Signed-off-by: Taylor Simpson<tsimpson@quicinc.com>
> ---
>   target/hexagon/macros.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Queued to hexagon-next.

r~


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-03-05 19:03 UTC | newest]

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2021-03-04 17:37 [PATCH v2] Hexagon (target/hexagon) Fix shift amount check in fASHIFTL/fLSHIFTR Taylor Simpson
2021-03-05 19:01 ` Richard Henderson

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