From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9875C5DF60 for ; Fri, 8 Nov 2019 10:40:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B25DE207FA for ; Fri, 8 Nov 2019 10:40:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="bNDOmiP4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731753AbfKHKkh (ORCPT ); Fri, 8 Nov 2019 05:40:37 -0500 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:23183 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726149AbfKHKkh (ORCPT ); Fri, 8 Nov 2019 05:40:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1573209635; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qrqWUJQWTmJgUkTe+8FskhOF7NgQLC9//N4YGCrm9N8=; b=bNDOmiP4JoidIYQZbo+bkMDtYDUBcq7BTpIbOnTrFKq/r7aDfY8HmhfywzBh+8fTpwlmG/ tzSp45CIENmA96NKQDeYHCIgHZ781WSUfdrbhQfn612AoaLmH7zT0YO7XMDHvMFl6fSvkX lf4//JrdAPV+UBtzDkG+8f144qPEt54= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-383-4vJuvT5GMNGLe6koCW6yLQ-1; Fri, 08 Nov 2019 05:40:32 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 237DD477; Fri, 8 Nov 2019 10:40:31 +0000 (UTC) Received: from [10.36.116.54] (ovpn-116-54.ams2.redhat.com [10.36.116.54]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7652A1001DC2; Fri, 8 Nov 2019 10:40:25 +0000 (UTC) From: Auger Eric Subject: Re: [PATCH v7 03/11] iommu/vt-d: Add custom allocator for IOASID To: Jacob Pan , iommu@lists.linux-foundation.org, LKML , Joerg Roedel , David Woodhouse , Alex Williamson , Jean-Philippe Brucker Cc: Yi Liu , "Tian, Kevin" , Raj Ashok , Christoph Hellwig , Lu Baolu , Jonathan Cameron References: <1571946904-86776-1-git-send-email-jacob.jun.pan@linux.intel.com> <1571946904-86776-4-git-send-email-jacob.jun.pan@linux.intel.com> Message-ID: Date: Fri, 8 Nov 2019 11:40:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <1571946904-86776-4-git-send-email-jacob.jun.pan@linux.intel.com> Content-Language: en-US X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-MC-Unique: 4vJuvT5GMNGLe6koCW6yLQ-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jacob, On 10/24/19 9:54 PM, Jacob Pan wrote: > When VT-d driver runs in the guest, PASID allocation must be > performed via virtual command interface. This patch registers a > custom IOASID allocator which takes precedence over the default > XArray based allocator. The resulting IOASID allocation will always > come from the host. This ensures that PASID namespace is system- > wide. >=20 > Signed-off-by: Lu Baolu > Signed-off-by: Liu, Yi L > Signed-off-by: Jacob Pan > --- > drivers/iommu/Kconfig | 1 + > drivers/iommu/intel-iommu.c | 67 +++++++++++++++++++++++++++++++++++++++= ++++++ > include/linux/intel-iommu.h | 2 ++ > 3 files changed, 70 insertions(+) >=20 > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > index fd50ddffffbf..961fe5795a90 100644 > --- a/drivers/iommu/Kconfig > +++ b/drivers/iommu/Kconfig > @@ -211,6 +211,7 @@ config INTEL_IOMMU_SVM > =09bool "Support for Shared Virtual Memory with Intel IOMMU" > =09depends on INTEL_IOMMU && X86 > =09select PCI_PASID > +=09select IOASID > =09select MMU_NOTIFIER > =09help > =09 Shared Virtual Memory (SVM) provides a facility for devices > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c > index 3f974919d3bd..ced1d89ef977 100644 > --- a/drivers/iommu/intel-iommu.c > +++ b/drivers/iommu/intel-iommu.c > @@ -1706,6 +1706,9 @@ static void free_dmar_iommu(struct intel_iommu *iom= mu) > =09=09if (ecap_prs(iommu->ecap)) > =09=09=09intel_svm_finish_prq(iommu); > =09} > +=09if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap)) > +=09=09ioasid_unregister_allocator(&iommu->pasid_allocator); > + > #endif > } > =20 > @@ -4910,6 +4913,44 @@ static int __init probe_acpi_namespace_devices(voi= d) > =09return 0; > } > =20 > +#ifdef CONFIG_INTEL_IOMMU_SVM > +static ioasid_t intel_ioasid_alloc(ioasid_t min, ioasid_t max, void *dat= a) > +{ > +=09struct intel_iommu *iommu =3D data; > +=09ioasid_t ioasid; > + > +=09/* > +=09 * VT-d virtual command interface always uses the full 20 bit > +=09 * PASID range. Host can partition guest PASID range based on > +=09 * policies but it is out of guest's control. > +=09 */ > +=09if (min < PASID_MIN || max > intel_pasid_max_id)> +=09=09return INVAL= ID_IOASID; > + > +=09if (vcmd_alloc_pasid(iommu, &ioasid)) > +=09=09return INVALID_IOASID; > + > +=09return ioasid; > +} > + > +static void intel_ioasid_free(ioasid_t ioasid, void *data) > +{ > +=09struct intel_iommu *iommu =3D data; > + > +=09if (!iommu) > +=09=09return; > +=09/* > +=09 * Sanity check the ioasid owner is done at upper layer, e.g. VFIO > +=09 * We can only free the PASID when all the devices are unbond. > +=09 */ > +=09if (ioasid_find(NULL, ioasid, NULL)) { > +=09=09pr_alert("Cannot free active IOASID %d\n", ioasid); > +=09=09return; > +=09} > +=09vcmd_free_pasid(iommu, ioasid); > +} > +#endif > + > int __init intel_iommu_init(void) > { > =09int ret =3D -ENODEV; > @@ -5020,6 +5061,32 @@ int __init intel_iommu_init(void) > =09=09=09=09 "%s", iommu->name); > =09=09iommu_device_set_ops(&iommu->iommu, &intel_iommu_ops); > =09=09iommu_device_register(&iommu->iommu); > +#ifdef CONFIG_INTEL_IOMMU_SVM > +=09=09if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap)) { > +=09=09=09pr_info("Register custom PASID allocator\n"); > +=09=09=09/* > +=09=09=09 * Register a custom ASID allocator if we are running > +=09=09=09 * in a guest, the purpose is to have a system wide PASID > +=09=09=09 * namespace among all PASID users. > +=09=09=09 * There can be multiple vIOMMUs in each guest but only > +=09=09=09 * one allocator is active. All vIOMMU allocators will > +=09=09=09 * eventually be calling the same host allocator. > +=09=09=09 */ > +=09=09=09iommu->pasid_allocator.alloc =3D intel_ioasid_alloc; > +=09=09=09iommu->pasid_allocator.free =3D intel_ioasid_free; > +=09=09=09iommu->pasid_allocator.pdata =3D (void *)iommu; > +=09=09=09ret =3D ioasid_register_allocator(&iommu->pasid_allocator); > +=09=09=09if (ret) { > +=09=09=09=09pr_warn("Custom PASID allocator registeration failed\n"); nit: registration > +=09=09=09=09/* > +=09=09=09=09 * Disable scalable mode on this IOMMU if there > +=09=09=09=09 * is no custom allocator. Mixing SM capable vIOMMU > +=09=09=09=09 * and non-SM vIOMMU are not supported:=20 nit; is not supported. But I guess you will reshape it according to previous comments. > +=09=09=09=09 */ > +=09=09=09=09intel_iommu_sm =3D 0; > +=09=09=09} > +=09=09} > +#endif > =09} > =20 > =09bus_set_iommu(&pci_bus_type, &intel_iommu_ops); > diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h > index 1d4b8dcdc5d8..c624733cb2e6 100644 > --- a/include/linux/intel-iommu.h > +++ b/include/linux/intel-iommu.h > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > =20 > #include > #include > @@ -546,6 +547,7 @@ struct intel_iommu { > #ifdef CONFIG_INTEL_IOMMU_SVM > =09struct page_req_dsc *prq; > =09unsigned char prq_name[16]; /* Name for PRQ interrupt */ > +=09struct ioasid_allocator_ops pasid_allocator; /* Custom allocator for = PASIDs */ > #endif > =09struct q_inval *qi; /* Queued invalidation info */ > =09u32 *iommu_state; /* Store iommu states between suspend and resume.*/ >=20 Thanks Eric From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19994FA372C for ; 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Fri, 08 Nov 2019 05:40:32 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 237DD477; Fri, 8 Nov 2019 10:40:31 +0000 (UTC) Received: from [10.36.116.54] (ovpn-116-54.ams2.redhat.com [10.36.116.54]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7652A1001DC2; Fri, 8 Nov 2019 10:40:25 +0000 (UTC) From: Auger Eric Subject: Re: [PATCH v7 03/11] iommu/vt-d: Add custom allocator for IOASID To: Jacob Pan , iommu@lists.linux-foundation.org, LKML , Joerg Roedel , David Woodhouse , Alex Williamson , Jean-Philippe Brucker References: <1571946904-86776-1-git-send-email-jacob.jun.pan@linux.intel.com> <1571946904-86776-4-git-send-email-jacob.jun.pan@linux.intel.com> Message-ID: Date: Fri, 8 Nov 2019 11:40:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <1571946904-86776-4-git-send-email-jacob.jun.pan@linux.intel.com> Content-Language: en-US X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-MC-Unique: 4vJuvT5GMNGLe6koCW6yLQ-1 X-Mimecast-Spam-Score: 0 Cc: "Tian, Kevin" , Raj Ashok , Jonathan Cameron X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org Hi Jacob, On 10/24/19 9:54 PM, Jacob Pan wrote: > When VT-d driver runs in the guest, PASID allocation must be > performed via virtual command interface. This patch registers a > custom IOASID allocator which takes precedence over the default > XArray based allocator. The resulting IOASID allocation will always > come from the host. This ensures that PASID namespace is system- > wide. > > Signed-off-by: Lu Baolu > Signed-off-by: Liu, Yi L > Signed-off-by: Jacob Pan > --- > drivers/iommu/Kconfig | 1 + > drivers/iommu/intel-iommu.c | 67 +++++++++++++++++++++++++++++++++++++++++++++ > include/linux/intel-iommu.h | 2 ++ > 3 files changed, 70 insertions(+) > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > index fd50ddffffbf..961fe5795a90 100644 > --- a/drivers/iommu/Kconfig > +++ b/drivers/iommu/Kconfig > @@ -211,6 +211,7 @@ config INTEL_IOMMU_SVM > bool "Support for Shared Virtual Memory with Intel IOMMU" > depends on INTEL_IOMMU && X86 > select PCI_PASID > + select IOASID > select MMU_NOTIFIER > help > Shared Virtual Memory (SVM) provides a facility for devices > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c > index 3f974919d3bd..ced1d89ef977 100644 > --- a/drivers/iommu/intel-iommu.c > +++ b/drivers/iommu/intel-iommu.c > @@ -1706,6 +1706,9 @@ static void free_dmar_iommu(struct intel_iommu *iommu) > if (ecap_prs(iommu->ecap)) > intel_svm_finish_prq(iommu); > } > + if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap)) > + ioasid_unregister_allocator(&iommu->pasid_allocator); > + > #endif > } > > @@ -4910,6 +4913,44 @@ static int __init probe_acpi_namespace_devices(void) > return 0; > } > > +#ifdef CONFIG_INTEL_IOMMU_SVM > +static ioasid_t intel_ioasid_alloc(ioasid_t min, ioasid_t max, void *data) > +{ > + struct intel_iommu *iommu = data; > + ioasid_t ioasid; > + > + /* > + * VT-d virtual command interface always uses the full 20 bit > + * PASID range. Host can partition guest PASID range based on > + * policies but it is out of guest's control. > + */ > + if (min < PASID_MIN || max > intel_pasid_max_id)> + return INVALID_IOASID; > + > + if (vcmd_alloc_pasid(iommu, &ioasid)) > + return INVALID_IOASID; > + > + return ioasid; > +} > + > +static void intel_ioasid_free(ioasid_t ioasid, void *data) > +{ > + struct intel_iommu *iommu = data; > + > + if (!iommu) > + return; > + /* > + * Sanity check the ioasid owner is done at upper layer, e.g. VFIO > + * We can only free the PASID when all the devices are unbond. > + */ > + if (ioasid_find(NULL, ioasid, NULL)) { > + pr_alert("Cannot free active IOASID %d\n", ioasid); > + return; > + } > + vcmd_free_pasid(iommu, ioasid); > +} > +#endif > + > int __init intel_iommu_init(void) > { > int ret = -ENODEV; > @@ -5020,6 +5061,32 @@ int __init intel_iommu_init(void) > "%s", iommu->name); > iommu_device_set_ops(&iommu->iommu, &intel_iommu_ops); > iommu_device_register(&iommu->iommu); > +#ifdef CONFIG_INTEL_IOMMU_SVM > + if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap)) { > + pr_info("Register custom PASID allocator\n"); > + /* > + * Register a custom ASID allocator if we are running > + * in a guest, the purpose is to have a system wide PASID > + * namespace among all PASID users. > + * There can be multiple vIOMMUs in each guest but only > + * one allocator is active. All vIOMMU allocators will > + * eventually be calling the same host allocator. > + */ > + iommu->pasid_allocator.alloc = intel_ioasid_alloc; > + iommu->pasid_allocator.free = intel_ioasid_free; > + iommu->pasid_allocator.pdata = (void *)iommu; > + ret = ioasid_register_allocator(&iommu->pasid_allocator); > + if (ret) { > + pr_warn("Custom PASID allocator registeration failed\n"); nit: registration > + /* > + * Disable scalable mode on this IOMMU if there > + * is no custom allocator. Mixing SM capable vIOMMU > + * and non-SM vIOMMU are not supported: nit; is not supported. But I guess you will reshape it according to previous comments. > + */ > + intel_iommu_sm = 0; > + } > + } > +#endif > } > > bus_set_iommu(&pci_bus_type, &intel_iommu_ops); > diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h > index 1d4b8dcdc5d8..c624733cb2e6 100644 > --- a/include/linux/intel-iommu.h > +++ b/include/linux/intel-iommu.h > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -546,6 +547,7 @@ struct intel_iommu { > #ifdef CONFIG_INTEL_IOMMU_SVM > struct page_req_dsc *prq; > unsigned char prq_name[16]; /* Name for PRQ interrupt */ > + struct ioasid_allocator_ops pasid_allocator; /* Custom allocator for PASIDs */ > #endif > struct q_inval *qi; /* Queued invalidation info */ > u32 *iommu_state; /* Store iommu states between suspend and resume.*/ > Thanks Eric _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu